X-Stream Operator’s Manual
WM-OM-E Rev I 433
keyword:
STEERING_LATENCY
arguments:
<value 0 to 10>
required?:
no
Notes:
The DDA's channel emulation uses decision directed steering. This means that the PLL and AGC are
not determined based on the nearest level to each sample. Instead, we wait STEERING_LATENCY
samples and then steer based on what the sample should have been according to the Viterbi
detector. The DDA uses 6 for PR4, EPR4, and E2PR4. After 6 samples it is far more likely that the
detector has already picked the correct path, and we will steer toward the correct target. If this
keyword is not seen, its value remains unchanged. If it has never been set since power on, the default
is 6. CAUTION: Increasing the steering latency increases the delay for the steering control loops and
may make them unstable. For a 16 state signal (such as E2PR4), the detector uses the sample at
STEERING_LATENCY into the trellis, and four more preceding it (that is, further into the trellis) to
determine the expected value for the sample at STEERING_LATENCY. The difference between the
actual sample value and the expected value determines steering.
possible error
messages:
"STEERING_LATENCY must be >= 0 and <=10"
keyword:
TOP_LEVEL_AS_FRACTION_OF_PEAK
arguments:
<number, 0.5 to 1.5>
required?:
yes
Notes:
This is the ratio of the nominal "1" sample level to the peak height of the VCO sync pattern. This is
used in our emulated channel's acquisition of the proper sampling phase and levels. For example,
using a 2T sync pattern, PR4 has levels +1, +1, -1, -1 & and the peaks are significantly higher. For
PR4, the DDA uses 0.7854 for this value. For EPR4, a 2T pattern is 0, +1, 0, -1& so the peaks are +1
and -1. For EPR4 the DDA uses 1.0000 for this value. For E2PR4 a 2T pattern is +0.6667, +0.6667,
-0.6667, -0.6667, and the peaks are higher, slightly above the +1 level. For E2PR4 the DDA uses
1.06045 for this value.
possible error
messages:
"top level must be > 0.5 and <= 1.50 x sync peak"
keyword:
TRELLIS_LENGTH
arguments:
<value 11 to 81>
required?:
no
Notes:
Because of internal implementation constraints, the trellis cannot be 28 to 32 long, or 60 to 64 long.
An attempt to set it within those ranges will be accepted but will actually set the next larger permitted
value, that is, 33 or 65. If this keyword is not seen its value remains unchanged. If this value is never
set the default is 81. Longer trellis size does not noticeably slow down processing. Longer trellis size
approaches true maximum likelihood to greater certainty. Real disk channels tend to have short
trellises and rely on encoding to avoid sequences that would require a longer trellis to resolve. On a
good signal all possible paths being maintained in the trellis are the same beyond a few bits in, the
vast majority of the time.
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