NXP Semiconductors i.MX8 QM - Page 88

Table 42. Revision History (continued)
REVISION DATE DESCRIPTION
- Added considerations for ADC_VREFH and ADC_VREFL to Table 36.
- FlexSPI signals explicitly included to the group of signals that must follow high-
speed signal routing. (High-speed routing recommendations)
- Added considerations for implementation of the USB Type-C connector – isolation
of the CC pins (USB Type-C considerations).
- Minor update in column names in Table 34.
- HDMI_ARC (ARC_P) capacitor changed from 0.1 uF to 1 uF (Figure 32).
- Added recommendations for unused DDR pins for i.MX8 QXP (Table 38)
- EMC/EMI considerations added to the PCIe design checklist table (Table 11).
- Added notes informing that MLB is not supported on i.MX8 QM to Table 9.
2.4p 06/2021
- Added a guideline on how to treat PMIC_ON_REQ when unused to Table 6.
- Updated the note for VDD_PCIE_1P8 in Table 10 to mention a 120 Ω ferrite bead
instead of a 47 nH inductor.
- Updated the information about the material used in the i.MX8QXP MEK stack-up in
Stack-up recommendation (i.MX8 QXP).
- Added a guideline that only point-to-point designs are supported to
LPDDR4-2400/3200 design recommendations.
- Added a datasheet reference note to Table 14 for the general crystal requirements
of the 32-kHz crystal.
- Added a reference to the internal load capacitors to Table 14.
- Updated VSS_SCU_XTAL considerations in Table 14.
- Added a note to Internal load capacitor trimming (24 MHz and 32.768 kHz) to provide
better explanation on mapping of the trim settings to capacitor values.
- Updated recommendations for the MIPI DSI power rails in Table 35 and Table 37.
- Added a guideline that VDD_USB_1P8 must be powered to Table 37.
- Added Using BSDL for board-level testing.
NXP Semiconductors
Revision history
i.MX8 QM / i.MX8 QXP Hardware Developer’s Guide, Rev. 2.4p, 06/2021
User's Guide 88 / 89