NXP Semiconductors MPC5777M - Page 146

MPC5777M Microcontroller Data Sheet, Rev. 6
Document revision history
NXP Semiconductors146
2 4/2013
Electrical characteristics—Power management: PMC, POR/LVD, sequencing
Table 40 (PMC operating conditions and external regulators supply voltage)
• Specification change: V
DD_HV_PMC,
Reduced internal regulator output capacity max
value is 3.5 V (was 5.5)
• Specification change: V
DD_HV_PMC
, Monitoring activity only min value is 2.7 V (was
3.0) and max value is 3.15 V (was 5.5)
Section 3.14.2, Power management integration
• Entire section replaced
Table 36 (Flash power supply):
•New
Section 3.14.4, Device voltage monitoring
• Added Figure 24 (Voltage monitor threshold definition)
Table 37 (Voltage monitor electrical characteristics)
•V
PORUP_LV Added footnote2, “Hysteresis is only true with the High voltage Supplies for
the I/O Main and the ADC are connected together. (There is actually around 1V of
Hysteresis using these two supplies.)”
• New specification: V
POR240
(HV supply power-on reset voltage monitoring)
• New specification: t
VDASSERT
(Voltage detector threshold crossing assertion)
• New specification: t
VDRELEASE
(Voltage detector threshold crossing deassertion)
• Specification change: V
PORUP_LV
, Rising voltage max value is 1180 mV (was 1170)
• Specification change: V
PORUP_LV
Falling voltage max value is 1100 mV
• Significant changes to footnotes for this table.
•V
LVD096
(LV internal supply low voltage monitoring). Footnote added: “LV internal
supply levels are measured on device internal supply grid after internal voltage drop.“
•V
LVD108
(LV internal supply low voltage monitoring). Footnote added: “LV internal
supply levels are measured on device internal supply grid after internal voltage drop.“
• Specification change: V
LVD112
max value is 1180 mV (was 1190)
• Specification change: VHVD140 is 1440 mV (was 1420)
• Specification change: V
PORUP_HV
Rising voltage max value is 4480 mV (was 4200);
min value is 4040. in addition, the Falling voltage min value is 2830 mV (was 2700) and
the max value of 3210 mV was added
• Specification change: V
LVD270
max value is 2950 mV (was 2980)
• Specification change: V
LVD400
max value is 4410 mV (was 4400); min value added for
Rising voltage. Also, changed min value for Falling voltage is 3970 mV (was 3980)
Specification change: V
HVD600
min value is 5560 mV (was 5520) and max value is
6000 mV (was 5960)
Table 39 (Functional terminals state during power-up and reset)
• Corrected ESR1 RESET pad state to “Weak pull-up” (was “pull-down”) and DEFAULT
pad state to “Weak pull-up” (was “pull-down”)
• Corrected TMS RESET pad state to “Weak pull-up” (was “pull-down”) and DEFAULT
pad state to “Weak pull-up” (was “pull-down”)
• Changed TDO RESET pad state to “High impedance” (was “Weak pull-up”)
• Revised TESTMODE footnote: “An internal pull-down is implemented on the
TESTMODE pin to prevent the device from entering test mode if the package
TESTMODE pin is not connected. It is recommended to connect the TESTMODE pin
to V
SS_HV_IO on the board for maximum robustness, but not required. The value of
TESTMODE is latched at the negation of reset and has no affect afterward. The device
will not exit functional reset with the TESTMODE pin asserted during power-up. The
TESTMODE pin can be connected externally directly to ground without any other
components.”
Table 76. Revision history (continued)
Revision Date Description of changes