Table 1-1. Acronyms and abbreviations (continued)
Acronym/abbreviation Description
SPI Serial peripheral interface
SRAM Static random-access memory
S1VDD Supply voltage for SerDes1 and SerDes2 core logic
SYSCLK System clock
TAP Test access port, for example, USB TAP or Ethernet TAP
TESTSEL Test select
TH_VDD Supply voltage for the Thermal Monitor unit
TRIG_IN/OUT Trigger input/output
TSEC Three-speed Ethernet controller
UART Universal asynchronous receiver/transmitter
uDIMM Unbuffered dual inline memory module form factor
USB Universal serial bus
USBCLK USB clock
VDD Supply voltage for core and platform
TA_BB_VDD Supply voltage for low power security monitor
XAUI Ten gigabit attachment unit interface
XVDD Supply voltage for SerDes1 and SerDes2 transceivers
1.2 Related documentation
This table lists and describes the additional documents available for more information on
the LS1043ARDB.
Table 1-2. Related documentation
Document Description
QorIQ LS1043ARDB Getting Started Guide
(LS1043ARDBGSG)
Describes the LS1043ARDB hardware kit, provides settings for the
onboard switches, connectors, jumpers, and LEDs, and explains the
basic board operations in a step-by-step manner
QorIQ LS1043A Reference Manual (LS1043ARM) Provides a detailed description on the LS1043A multicore processor and
its features, such as memory map, serial interfaces, power supply, chip
features, and clock information
QorIQ LS1043A Data Sheet Contains information on the LS1043A pin assignments, electrical
characteristics, hardware design considerations, package information,
and ordering information
LS1043A Chip Errata Provides details of all known silicon errata for the LS1043A processor
NOTE
Some of the documents listed in the table above, may be
available only under a non-disclosure agreement (NDA). To
Related documentation
QorIQ LS1043A Reference Design Board Reference Manual, Rev. 4, 11/2017
10 NXP Semiconductors
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