NXP Semiconductors QorIQ LS1043ARDB - Status LED Control Register; Global Reset Register

6.1.13 Status LED control register (CPLD_STATUS_LED)
Use this register to specify if status LED is ON or OFF.
Address: 0h base + Dh offset = Dh
Bit 0 1 2 3 4 5 6 7
Read
STATUS_
LED_CTRL
Reserved
Write
Reset
0 0 0 0 0 0 0 0
CPLD_STATUS_LED field descriptions
Field Description
0
STATUS_LED_
CTRL
Status LED control
0 LED OFF (default value)
1 LED ON
1–7
-
This field is reserved.
6.1.14 Global reset register (CPLD_GLOBAL_RST)
Write this register to reset the whole system, initializing all CPLD registers to their
default values.
Address:
0h base + Eh offset = Eh
Bit 0 1 2 3 4 5 6 7
Read
GLOBAL_
RST
Reserved
Write
Reset
0 0 0 0 0 0 0 0
CPLD_GLOBAL_RST field descriptions
Field Description
0
GLOBAL_RST
0 System is running (default value)
1 System is reset
1–7
-
This field is reserved.
CPLD memory map / register definitions
QorIQ LS1043A Reference Design Board Reference Manual, Rev. 4, 11/2017
60 NXP Semiconductors