NOTE
Some DSPI pins are muxed with eSDHC pins; therefore, DSPI
functionality depends on the eSDHC configuration.
The table below describes the LS1043ARDB SPI flash memory.
Table 2-4. DSPI slave devices
Device Maximum clock frequency Voltage range Capacity Chip select
Micron
MT25QU128ABA1EW7
-0SIT
166 MHz 1.7 V - 2 V 16 MB CS0
2.4 Ethernet interface
The LS1043A processor supports the following two Ethernet controllers (ECs):
• EC1 port: Operates in the RGMII mode
• EC2 port: Operates in the RGMII mode
Each of these ports can connect to an Ethernet PHY using the RGMII protocol. The
figure below shows each EC port connected to a Realtek RTL8211FS PHY on the
LS1043ARDB.
LS1043A
RTL8211FS
RTL8211FS
eTSEC2
eTSEC1
MDIO/MDC
EMI1_MDC/MDIO
Address 2
Address 1
P1
Figure 2-6. Ethernet interface
Ethernet interface
QorIQ LS1043A Reference Design Board Reference Manual, Rev. 4, 11/2017
24 NXP Semiconductors
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