request access to such documents, contact your local NXP field
applications engineer or sales representative.
1.3 Board features
The table below lists the features of the LS1043ARDB.
Table 1-3. LS1043ARDB features
LS1043ARDB feature Specification Description
Processor support Core processors 4x64-bit up to 1.6 GHz ARM® Cortex®-v8 A53 cores
High-speed serial ports (SerDes) • Supports 4 lanes, up to 10.3125 GHz SerDes
• Supports PCIe 2.0, QSGMII, and XFI
• Two PCIe connectors supporting:
• Mini-PCIe card
• Standard PCIe card
• X1 RJ45 connector for Ethernet 10G support
• X4 RJ45 connector for QSGMII support
DDR • Supports 2 GB DDR4 SDRAM discrete devices
• 32-bit DDR4 bus
• Supports data rates of up to 1600 MT/s
USB 3.0 • Two super-speed USB 3.0 type A ports
• Supports x1 USB 2.0 connection on the mini-PCIe
connector
IFC • One 128 MB NOR flash 16-bit data bus (1.8 V)
• One 512 MB SLC NAND flash with ECC support (1.8
V)
• CPLD connection: 8-bit registers in CPLD to configure
some mux/demux selections
eSDHC • SDHC port connects directly to a full SD/MMC slot.
DSPI • 16 MB high-speed flash memory (up to 108 MHz in
the Single-Transfer Rate mode)
DUART • One RJ45 to DB9 connector with two UART ports
• UART1 is routed to CMSISDAP circuit and supports
USB port to access serial port as console
Package • 21 x 21 mm, 621 flip-chip, plastic-ball, grid array (FC-
PBGA)
System logic CPLD • Manages system power and reset sequencing
• Latches IFC address/data multiplexed signals
• Controls signal muxing/demuxing
Clock SYSCLK • Supports single-ended SYSCLK, DDRCLK clock
input, with default value as 100 MHz
• Supports single-source differential DIFF_SYCLK_/
DIFF_SYSCLK_N, 100 MHz
SerDes • Provides clocks to all SerDes blocks and slots
• 100 MHz or 156.25 MHz for PLL1
• 100 MHz for PLL2
RTC • Supports 32.768 kHz for RTC
Table continues on the next page...
Chapter 1 Introduction
QorIQ LS1043A Reference Design Board Reference Manual, Rev. 4, 11/2017
NXP Semiconductors 11
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