NXP Semiconductors QorIQ LS1043ARDB - Page 22

• The SDHC_VS pin is used to select EVDD between 1.8 V and 3.3 V SD card I/O
voltages.
• MMC 8-bit data high-speed operation is limited by voltage translation hardware.
SDHC/SDHX is supported in either 1-bit or 4-bit data mode for either 3.3 V or 1.8 V
bus operation. Bus frequency above 50 MHz requires dynamically changing the
LS1043ARDB EVDD voltage supply rail from 3.3 V to 1.8 V as described in SD
Physical Layer Specification version 3.01.
The figure below shows the eSDHC signal connections supported on the LS1043ARDB.
EVDD = 1.8 V
SDHC_VS
EVDD
EVDD = 3.3 V
1
0
SD card
Pin 1
Pin 2
Pin 6
Pin 4
Pin 8
Pin 5
Pin 9
Pin 7
Pin 3
LS1043A
SDHC_DAT[0:3]
SDHC_CLK
SDHC_CMD
EVDD
Figure 2-4. eSDHC connections
The table below shows the pinout configuration of the SD card shown in the figure
above.
Table 2-3. SD card pinout configuration
Pin number Signal name Description
Pin 1 DAT2 Data signal 2
Pin 2 DAT3 Data signal 3
Pin 3 CMD I/O Input/output command
Pin 4 GND Supply voltage negative
Pin 5 VDD Supply voltage positive
Pin 6 CLK Clock signal
Pin 7 GND Supply voltage negative
Pin 8 DAT0 Data signal 0
Pin 9 DAT1 Data signal 1
Serial interfaces
QorIQ LS1043A Reference Design Board Reference Manual, Rev. 4, 11/2017
22 NXP Semiconductors