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Sequence Output Instructions Section 3-3
If S and R are ON simultaneously, the reset input takes precedence.
The set input (S) cannot be received while R is ON.
KEEP(011) has an immediate refreshing variation (!KEEP(011)). When an
external output bit has been specified for B in a !KEEP(011) instruction, any
changes to B will be refreshed when !KEEP(011) is executed and reflected
immediately in the output bit for the CPU Unit built-in output.
KEEP(011) operates like the self-maintaining bit, but a self-maintaining bit
programmed with KEEP(011) requires one less instruction.
Self-maintaining bits programmed with KEEP(011) will maintain status even in
an interlock program section, unlike the self-maintaining bit programmed with-
out KEEP(011).
Set
Reset
Status of C
Set
Reset
Status of C
0.02 0.03
100.00
100.00
0.02
0.03
100.00
Output bit C will maintain its
previous status in an interlock.
Output bit C will be turned
OFF in an interlock.
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