Panasonic DMR-E55PL - Display

L
L
H
H
H
H
H
L
H
H
H
DMR-E55PLS
TIMER BLOCK DIAGRAM
P FAIL80
FAN LOCK
JC P ON
CV IN
L123 SWIDE
SLICER VIDEO
VCC
21
F+
F-
4
5
1
T7501
REGULATOR
DISPLAY
IP7501
PROTECTOR
IC
FIP
51
- -
SEG35
SEG41
45
-
SEG26
-
12SEG31
17
SEG25
25
19
-
SEG19
--
SEG00
-
35
44
SEG09
56
63
-
DIG07
-
DIG00
SDATA
SCK
CS
RESET1
2
3
4
C0HBB0000033
(DISPLAY DRIVE)
FL RXD 5
56 P SAVE
XC OUT
XC IN
10
9
(REAL TIME CLK)
32.768KHz
X7502
113
69
C2CBJG000381
(TIMER)
L1 SWIDE
SYNC IN
XT MUTE
X OUT
X IN
FAN PWM OUT
SYS PFAIL
DR P ON
POWER ON
P SAVE
FL TXD
FL CLK
FL CS
FL RESET
KEY IN1
TIME WARP LED
IR
KEY IN2
KEY IN3
99
109
20
12
14
64
23
81
89
86
88
4
6
87
84
96
74
2
97
104
3
P7503
1
P7503
DP7501
DISPLAY
(MAIN CLK)
10MHz
X7501
FAN MOTOR
M
(FAN MOTOR SWITCH)
Q7512
X SW13V
POWER ON
DR P ON
JC P ON
SYS PFAIL
XT MUTE
BLOCK SECTION
FROM VIDEO
(QR4001,4004)
TO AUDIO BLOCK SEC.
BLOCK SECTION
POWER
TO/FROM
FANPWM
15
C0ABBA000146
(FAN MOTOR DRIVE)
A OUTB+IN
SEG00-SEG41
DIG00-DIG07
IC7501
IC7506
IC7502
49
DMR-E55PL