© by SEMIKRON / 2017-09-07 / Technical Explanation / SKiiP
4
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5.2.6 HALT Logic Signal
The HALT signal provides the following characteristics and functionality:
• enabling and disabling the gate driver
• dominant/recessive (settable and readable by driver and user controller board)
• low active (LOW = IGBT driver disabled, HIGH = IGBT driver enabled)
• digital signal referred to the driver supply voltage VS
The driver will set the HALT signal to LOW state:
• during power on reset,
• when an error status is active (refer to chapter 5.3.7).
The driver releases the HALT signal (recessive HIGH state):
• after the power-on reset time has elapsed and no error is present and both TOP/BOT signals are
LOW
• after the error reset time has elapsed and no error is present and both signal inputs TOP/BOT are
LOW
The HALT signals of all SKiiPs in one application can be connected together. Also other hardware
components can be connected to this signal, when an open drain/collector output is implemented. In this
case all signals that are connected to the HALT signal are wired-ored. That means the HALT signal is set to
LOW state when one of the connected SKiiPs is not ready to operate.
Please note: In this paralleled configuration there is no possibility to see which SKiiP
®
4 set the HALT
signal. For this purpose the CAN-diagnostic interface should be used
This parallel connection of HALT signals provides a fast disabling of IGBT switching in case of an error or
power up. Hence, the operation of such paralleled SKiiP 4can only start when all SKiiP 4 are ready to
operate. The HALT signals of all SKiiPs in the application can be connected to the controller separately, too,
as shown in Figure 5.9. The circuit on the driver board is shown on the left hand side. The gate driver can
be set into HALT state by setting the CMN_HALT signal to GND at the user controller board.
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