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ST STM32F31xx User Manual

ST STM32F31xx
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Controller area network (bxCAN)
UM1581
114/584
DocID023800 Rev 1
 CAN_FLAG_FF1: FIFO 0 and 1 Full Flags; Set when three messages are stored
in the selected FIFO.
 CAN_FLAG_FOV0.
 CAN_FLAG_FOV1: FIFO 0 and 1 Overrun Flags; Set when a new message has
been received and passed the filter while the FIFO was full.
ï‚· Operating Mode Flags:
 CAN_FLAG_WKU: Wake up Flag; Set to signal that a SOF bit has been
detected while the CAN hardware was in Sleep mode.
 CAN_FLAG_SLAK: Sleep acknowledge Flag; Set to signal that the CAN has
entered Sleep Mode.
ï‚· Error Flags:
 CAN_FLAG_EWG: Error Warning Flag; Set when the warning limit has been
reached (Receive Error Counter or Transmit Error Counter greater than 96). This
Flag is cleared only by hardware.
 CAN_FLAG_EPV: Error Passive Flag; Set when the Error Passive limit has been
reached (Receive Error Counter or Transmit Error Counter greater than 127).
This Flag is cleared only by hardware.
 CAN_FLAG_BOF: Bus-Off Flag; Set when CAN enters the bus-off state. The
bus-off state is entered on TEC overflow, greater than 255. This Flag is cleared
only by hardware.
 CAN_FLAG_LEC: Last error code Flag; Set If a message has been transferred
(reception or transmission) with error, and the error code is hold.
Interrupts
The 14 interrupts can be divided on 4 groups:
ï‚· Transmit interrupt:
 CAN_IT_TME: Transmit mailbox empty Interrupt; If enabled, this interrupt source
is pending when no transmit request are pending for Tx mailboxes.
ï‚· Receive Interrupts:
 CAN_IT_FMP0.
 CAN_IT_FMP1: FIFO 0 and FIFO1 message pending Interrupts; If enabled,
these interrupt sources are pending when messages are pending in the receive
FIFO. The corresponding interrupt pending bits are cleared only by hardware.
 CAN_IT_FF0.
 CAN_IT_FF1: FIFO 0 and FIFO1 full Interrupts; If enabled, these interrupt
sources are pending when three messages are stored in the selected FIFO.
 CAN_IT_FOV0.
 CAN_IT_FOV1: FIFO 0 and FIFO1 overrun Interrupts; If enabled, these interrupt
sources are pending when a new message has been received and passed the
filter while the FIFO was full.
ï‚· Operating Mode Interrupts:
 CAN_IT_WKU: Wake-up Interrupt; If enabled, this interrupt source is pending
when a SOF bit has been detected while the CAN hardware was in Sleep mode.
 CAN_IT_SLK: Sleep acknowledge Interrupt: If enabled, this interrupt source is
pending when the CAN has entered Sleep Mode.
ï‚· Error Interrupts:
 CAN_IT_EWG: Error warning Interrupt; If enabled, this interrupt source is
pending when the warning limit has been reached (Receive Error Counter or
Transmit Error Counter=96).
 CAN_IT_EPV: Error passive Interrupt; If enabled, this interrupt source is pending
when the Error Passive limit has been reached (Receive Error Counter or
Transmit Error Counter>127).

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ST STM32F31xx Specifications

General IconGeneral
BrandST
ModelSTM32F31xx
CategoryMicrocontrollers
LanguageEnglish

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