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ST STM32F31xx User Manual

ST STM32F31xx
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Reset and clock control (RCC)
UM1581
314/584
DocID023800 Rev 1
ï‚· RCC_PLLConfig()
ï‚· RCC_PLLCmd()
ï‚· RCC_PREDIV1Config()
ï‚· RCC_ClockSecuritySystemCmd()
ï‚· RCC_MCOConfig()
18.2.3 System, AHB, APB1 and APB2 busses clocks configuration functions
This section provide functions allowing to configure the System, AHB, APB1 and APB2
busses clocks.
1. Several clock sources can be used to drive the System clock (SYSCLK): HSI, HSE
and PLL. The AHB clock (HCLK) is derived from System clock through configurable
prescaler and used to clock the CPU, memory and peripherals mapped on AHB bus
(DMA and GPIO). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived from AHB
clock through configurable prescalers and used to clock the peripherals mapped on
these busses. You can use "RCC_GetClocksFreq()" function to retrieve the
frequencies of these clocks.
2. The maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is 72 MHz.
Depending on the maximum frequency, the FLASH wait states (WS) should be
adapted accordingly:
Wait states
HCLK clock frequency (MHz)
0WS(1CPU cycle)
0 < HCLK <= 24
1WS(2CPU cycles)
24 < HCLK <= 48
2WS(3CPU cycles)
48 < HCLK <= 72
3. After reset, the System clock source is the HSI (8 MHz) with 0 WS and prefetch is
disabled.
All the peripheral clocks are derived from the System clock (SYSCLK) except:
ï‚· The FLASH program/erase clock which is always HSI 8MHz clock.
ï‚· The USB 48 MHz clock which is derived from the PLL VCO clock.
ï‚· The USART clock which can be derived as well from HSI 8MHz, LSI or LSE.
ï‚· The I2C clock which can be derived as well from HSI 8MHz clock.
ï‚· The ADC clock which is derived from PLL output.
ï‚· The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC (HSE
divided by a programmable prescaler). The System clock (SYSCLK)
frequency must be higher or equal to the RTC clock frequency.
ï‚· IWDG clock which is always the LSI clock.
It is recommended to use the following software sequences to tune the number of wait
states needed to access the Flash memory with the CPU frequency (HCLK).
ï‚· Increasing the CPU frequency
 Program the Flash Prefetch buffer, using "FLASH_PrefetchBufferCmd(ENABLE)"
function
 Check that Flash Prefetch buffer activation is taken into account by reading
FLASH_ACR using the FLASH_GetPrefetchBufferStatus() function
 Program Flash WS to 1 or 2, using "FLASH_SetLatency()" function

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ST STM32F31xx Specifications

General IconGeneral
BrandST
ModelSTM32F31xx
CategoryMicrocontrollers
LanguageEnglish

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