Analog-to-digital converter (ADC)
3 Analog-to-digital converter (ADC)
3.1 ADC Firmware driver registers structures
3.1.1 ADC_Common_TypeDef
ADC_Common_TypeDef is defined in the stm32f30x.h
Data Fields
ï‚· __IO uint32_t CSR
ï‚· uint32_t RESERVED
ï‚· __IO uint32_t CCR
ï‚· __IO uint32_t CDR
Field Documentation
ï‚· __IO uint32_t ADC_Common_TypeDef::CSR
ï€ ADC Common status register, Address offset: ADC1/3 base address + 0x300
ï‚· uint32_t ADC_Common_TypeDef::RESERVED
ï€ Reserved, ADC1/3 base address + 0x304
ï‚· __IO uint32_t ADC_Common_TypeDef::CCR
ï€ ADC common control register, Address offset: ADC1/3 base address + 0x308
ï‚· __IO uint32_t ADC_Common_TypeDef::CDR
ï€ ADC common regular data register for dual AND triple modes, Address offset:
ADC1/3 base address + 0x30C
3.1.2 ADC_CommonInitTypeDef
ADC_CommonInitTypeDef is defined in the stm32f30x_adc.h
Data Fields
ï‚· uint32_t ADC_Mode
ï‚· uint32_t ADC_Clock
ï‚· uint32_t ADC_DMAAccessMode
ï‚· uint32_t ADC_DMAMode
ï‚· uint8_t ADC_TwoSamplingDelay
Field Documentation
ï‚· uint32_t ADC_CommonInitTypeDef::ADC_Mode
ï€ Configures the ADC to operate in independent or multi mode. This parameter
can be a value of ADC_mode
ï‚· uint32_t ADC_CommonInitTypeDef::ADC_Clock