Controller area network (bxCAN)
ï‚· __IO uint32_t CAN_TypeDef::BTR
ï€ CAN bit timing register, Address offset: 0x1C
ï‚· uint32_t CAN_TypeDef::RESERVED0[88]
ï€ Reserved, 0x020 - 0x17F
ï‚· CAN_TxMailBox_TypeDef CAN_TypeDef::sTxMailBox[3]
ï€ CAN Tx MailBox, Address offset: 0x180 - 0x1AC
ï‚· CAN_FIFOMailBox_TypeDef CAN_TypeDef::sFIFOMailBox[2]
ï€ CAN FIFO MailBox, Address offset: 0x1B0 - 0x1CC
ï‚· uint32_t CAN_TypeDef::RESERVED1[12]
ï€ Reserved, 0x1D0 - 0x1FF
ï‚· __IO uint32_t CAN_TypeDef::FMR
ï€ CAN filter master register, Address offset: 0x200
ï‚· __IO uint32_t CAN_TypeDef::FM1R
ï€ CAN filter mode register, Address offset: 0x204
ï‚· uint32_t CAN_TypeDef::RESERVED2
ï€ Reserved, 0x208
ï‚· __IO uint32_t CAN_TypeDef::FS1R
ï€ CAN filter scale register, Address offset: 0x20C
ï‚· uint32_t CAN_TypeDef::RESERVED3
ï€ Reserved, 0x210
ï‚· __IO uint32_t CAN_TypeDef::FFA1R
ï€ CAN filter FIFO assignment register, Address offset: 0x214
ï‚· uint32_t CAN_TypeDef::RESERVED4
ï€ Reserved, 0x218
ï‚· __IO uint32_t CAN_TypeDef::FA1R
ï€ CAN filter activation register, Address offset: 0x21C
ï‚· uint32_t CAN_TypeDef::RESERVED5[8]
ï€ Reserved, 0x220-0x23F
ï‚· CAN_FilterRegister_TypeDef CAN_TypeDef::sFilterRegister[28]
ï€ CAN Filter Register, Address offset: 0x240-0x31C
4.1.2 CAN_FIFOMailBox_TypeDef
CAN_FIFOMailBox_TypeDef is defined in the stm32f30x.h
Data Fields
ï‚· __IO uint32_t RIR
ï‚· __IO uint32_t RDTR
ï‚· __IO uint32_t RDLR
ï‚· __IO uint32_t RDHR
Field Documentation
ï‚· __IO uint32_t CAN_FIFOMailBox_TypeDef::RIR
ï€ CAN receive FIFO mailbox identifier register
ï‚· __IO uint32_t CAN_FIFOMailBox_TypeDef::RDTR
ï€ CAN receive FIFO mailbox data length control and time stamp register
ï‚· __IO uint32_t CAN_FIFOMailBox_TypeDef::RDLR