ST STM32F31xx User Manual

UM1581
Serial peripheral interface (SPI)
DocID023800 Rev 1
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SCK slave input clock as soon as CRCEN is set, and this, whatever the
value of the SPE bit.
 With high bitrate frequencies, be careful when transmitting the CRC. As the
number of used CPU cycles has to be as low as possible in the CRC transfer
phase, it is forbidden to call software functions in the CRC transmission
sequence to avoid errors in the last data and CRC reception. In fact,
CRCNEXT bit has to be written before the end of the transmission/reception
of the last data.
 For high bit rate frequencies, it is advised to use the DMA mode to avoid the
degradation of the SPI speed performance due to CPU accesses impacting
the SPI bandwidth.
 When the STM32F30x are configured as slaves and the NSS hardware
mode is used, the NSS pin needs to be kept low between the data phase and
the CRC phase.
 When the SPI is configured in slave mode with the CRC feature enabled,
CRC calculation takes place even if a high level is applied on the NSS pin.
This may happen for example in case of a multislave environment where the
communication master addresses slaves alternately.
 Between a slave deselection (high level on NSS) and a new slave selection
(low level on NSS), the CRC value should be cleared on both master and
slave sides in order to resynchronize the master and slave for their
respective CRC calculation.
To clear the CRC, follow the procedure below:
1. Disable SPI using the SPI_Cmd() function.
2. Disable the CRC calculation using the SPI_CalculateCRC() function.
3. Enable the CRC calculation using the SPI_CalculateCRC() function.
4. Enable SPI using the SPI_Cmd() function.
 SPI_CRCLengthConfig()
 SPI_CalculateCRC()
 SPI_TransmitCRC()
 SPI_GetCRC()
 SPI_GetCRCPolynomial()
20.2.5 DMA transfers management functions
 SPI_I2S_DMACmd()
 SPI_LastDMATransferCmd()
20.2.6 Interrupts and flags management functions
This section provides a set of functions allowing to configure the SPI/I2S Interrupts
sources and check or clear the flags or pending bits status. The user should identify which
mode will be used in his application to manage the communication: Polling mode, Interrupt
mode or DMA mode.
Polling Mode
In Polling Mode, the SPI/I2S communication can be managed by 9 flags:

ST STM32F31xx Specifications

General

Brand	ST
Model	STM32F31xx
Category	Microcontrollers
Language	English