General-purpose timers (TIM)
22 General-purpose timers (TIM)
22.1 TIM Firmware driver registers structures
22.1.1 TIM_TypeDef
TIM_TypeDef is defined in the stm32f30x.h
Data Fields
ï‚· __IO uint16_t CR1
ï‚· uint16_t RESERVED0
ï‚· __IO uint32_t CR2
ï‚· __IO uint32_t SMCR
ï‚· __IO uint32_t DIER
ï‚· __IO uint32_t SR
ï‚· __IO uint32_t EGR
ï‚· __IO uint32_t CCMR1
ï‚· __IO uint32_t CCMR2
ï‚· __IO uint32_t CCER
ï‚· __IO uint32_t CNT
ï‚· __IO uint16_t PSC
ï‚· uint16_t RESERVED9
ï‚· __IO uint32_t ARR
ï‚· __IO uint16_t RCR
ï‚· uint16_t RESERVED10
ï‚· __IO uint32_t CCR1
ï‚· __IO uint32_t CCR2
ï‚· __IO uint32_t CCR3
ï‚· __IO uint32_t CCR4
ï‚· __IO uint32_t BDTR
ï‚· __IO uint16_t DCR
ï‚· uint16_t RESERVED12
ï‚· __IO uint16_t DMAR
ï‚· uint16_t RESERVED13
ï‚· __IO uint16_t OR
ï‚· __IO uint32_t CCMR3
ï‚· __IO uint32_t CCR5
ï‚· __IO uint32_t CCR6
Field Documentation
ï‚· __IO uint16_t TIM_TypeDef::CR1
ï€ TIM control register 1, Address offset: 0x00
ï‚· uint16_t TIM_TypeDef::RESERVED0
ï€ Reserved, 0x02
ï‚· __IO uint32_t TIM_TypeDef::CR2
ï€ TIM control register 2, Address offset: 0x04
ï‚· __IO uint32_t TIM_TypeDef::SMCR