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UM1581

Power control (PWR)

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17 Power control (PWR)

17.1 PWR Firmware driver registers structures

17.1.1 PWR_TypeDef

PWR_TypeDef is defined in the stm32f30x.h

Data Fields

 __IO uint32_t CR

 __IO uint32_t CSR

Field Documentation

 __IO uint32_t PWR_TypeDef::CR

 PWR power control register, Address offset: 0x00

 __IO uint32_t PWR_TypeDef::CSR

 PWR power control/status register, Address offset: 0x04

17.2 PWR Firmware driver API description

The following section lists the various functions of the PWR library.

17.2.1 Backup Domain Access function

After reset, the Backup Domain Registers (RCC BDCR Register, RTC registers and RTC

backup registers) are protected against possible stray write accesses.

To enable access to Backup domain use the PWR_BackupAccessCmd(ENABLE)

function.

 PWR_DeInit()

 PWR_BackupAccessCmd()

17.2.2 PVD configuration functions

 The PVD is used to monitor the VDD power supply by comparing it to a threshold

selected by the PVD Level (PLS[2:0] bits in the PWR_CR).

 A PVDO flag is available to indicate if VDD/VDDA is higher or lower than the PVD

threshold. This event is internally connected to the EXTI line16 and can generate an

interrupt if enabled through the EXTI registers.

 The PVD is stopped in Standby mode.

 PWR_PVDLevelConfig()

 PWR_PVDCmd()

ST STM32F31xx User Manual

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