Universal synchronous asynchronous receiver
transmitter (USART)
23 Universal synchronous asynchronous receiver
transmitter (USART)
23.1 USART Firmware driver registers structures
23.1.1 USART_TypeDef
USART_TypeDef is defined in the stm32f30x.h
Data Fields
ï‚· __IO uint32_t CR1
ï‚· __IO uint32_t CR2
ï‚· __IO uint32_t CR3
ï‚· __IO uint16_t BRR
ï‚· uint16_t RESERVED1
ï‚· __IO uint16_t GTPR
ï‚· uint16_t RESERVED2
ï‚· __IO uint32_t RTOR
ï‚· __IO uint16_t RQR
ï‚· uint16_t RESERVED3
ï‚· __IO uint32_t ISR
ï‚· __IO uint32_t ICR
ï‚· __IO uint16_t RDR
ï‚· uint16_t RESERVED4
ï‚· __IO uint16_t TDR
ï‚· uint16_t RESERVED5
Field Documentation
ï‚· __IO uint32_t USART_TypeDef::CR1
ï€ USART Control register 1, Address offset: 0x00
ï‚· __IO uint32_t USART_TypeDef::CR2
ï€ USART Control register 2, Address offset: 0x04
ï‚· __IO uint32_t USART_TypeDef::CR3
ï€ USART Control register 3, Address offset: 0x08
ï‚· __IO uint16_t USART_TypeDef::BRR
ï€ USART Baud rate register, Address offset: 0x0C
ï‚· uint16_t USART_TypeDef::RESERVED1
ï€ Reserved, 0x0E
ï‚· __IO uint16_t USART_TypeDef::GTPR
ï€ USART Guard time and prescaler register, Address offset: 0x10
ï‚· uint16_t USART_TypeDef::RESERVED2
ï€ Reserved, 0x12
ï‚· __IO uint32_t USART_TypeDef::RTOR
ï€ USART Receiver Time Out register, Address offset: 0x14
ï‚· __IO uint16_t USART_TypeDef::RQR