System configuration controller (SYSCFG)
21.3 SYSCFG Firmware driver defines
21.3.1 SYSCFG
SYSCFG
SYSCFG_DMA_Remap_Config
ï‚· #define: SYSCFG_DMARemap_TIM17 SYSCFG_CFGR1_TIM17_DMA_RMP
Remap TIM17 DMA requests from channel1 to channel2
ï‚· #define: SYSCFG_DMARemap_TIM16 SYSCFG_CFGR1_TIM16_DMA_RMP
Remap TIM16 DMA requests from channel3 to channel4
ï‚· #define: SYSCFG_DMARemap_TIM6DAC1
SYSCFG_CFGR1_TIM6DAC1_DMA_RMP
Remap TIM6/DAC1 DMA requests from DMA2 channel3 to DMA1 channel3
ï‚· #define: SYSCFG_DMARemap_TIM7DAC2
SYSCFG_CFGR1_TIM7DAC2_DMA_RMP
Remap TIM7/DAC2 DMA requests from DMA2 channel4 to DMA1 channel4
ï‚· #define: SYSCFG_DMARemap_ADC2ADC4 SYSCFG_CFGR1_ADC24_DMA_RMP
Remap ADC2 and ADC4 DMA requests from DMA2 channel1/channel3 to
channel3/channel4
SYSCFG_EncoderRemap_Config
ï‚· #define: SYSCFG_EncoderRemap_No ((uint32_t)0x00000000)
No redirection
ï‚· #define: SYSCFG_EncoderRemap_TIM2 SYSCFG_CFGR1_ENCODER_MODE_0
Timer 2 IC1 and IC2 connected to TIM15 IC1 and IC2
ï‚· #define: SYSCFG_EncoderRemap_TIM3 SYSCFG_CFGR1_ENCODER_MODE_1
Timer 3 IC1 and IC2 connected to TIM15 IC1 and IC2
ï‚· #define: SYSCFG_EncoderRemap_TIM4 SYSCFG_CFGR1_ENCODER_MODE
Timer 4 IC1 and IC2 connected to TIM15 IC1 and IC2