How to use and customize the library
Figure 8: STM32F30/31xx programming model using the library
1. System clock configuration: the STM32F30/31xx devices can run at frequency up to
72 MHz and feature several prescalers to configure the AHB, APB1 and APB2
frequencies. The maximum frequency of the AHB domain is 72 MHz. The maximum
allowed frequency of the high-speed APB2 domain is 72 MHz, while the maximum
allowed frequency of the low speed APB1 domain is 36 MHz. If the application
requires higher frequency/performance, follow the sequence below to configure the
system clock:
a. Configure the Flash wait state through FLASH_ACR register. For more details
refer to Section 11: "FLASH Memory (FLASH)"
b. Select the clock source to be used. Internal (HSI 8MHz) or external (HSE up to 8
MHz).
c. Configure the PLL (optional), system input clock and AHB, APB1 and APB2
prescaler. For more details, refer to Section 18: "Reset and clock control
(RCC)"You can use the clock configuration tool
(STM32F30xx_Clock_Configuration.xls) to generate a customized
system_stm32f30x.c file depending on your application requirements.
2. Enable the clock for the peripheral(s) to be used: Before starting to use a
peripheral, enable the corresponding interface clock, as well as the clock for the
associated GPIOs. This is done by using one of the following functions:
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_PPPx, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_PPPx, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PPPx, ENABLE);For example,
the following function should be used to enable USART1 interface clock :
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);For more
details, refer to Section 19: "Real-time clock (RTC)"
3. Configure the clock source(s) for peripherals which clocks are not derived from the
System clock:
a. RTC: STM32F30/31xx RTC clock can be derived either from a LSI, LSE or HSE
clock divided by 2 to 31. For more details, refer to Section 19: "Real-time clock
(RTC)"
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