ST STM32F31xx User Manual

UM1581
System configuration controller (SYSCFG)
DocID023800 Rev 1
445/584
 #define: SYSCFG_I2CFastModePlus_I2C2 SYSCFG_CFGR1_I2C2_FMP
Enable Fast Mode Plus on I2C2 pins
SYSCFG_Lock_Config
 #define: SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK
Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the
PVD_EN and PVDSEL[2:0] bits of the Power Control Interface
 #define: SYSCFG_Break_SRAMParity SYSCFG_CFGR2_SRAM_PARITY_LOCK
Enables and locks the SRAM_PARITY error signal with Break Input of TIM1/8/15/16/17
 #define: SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK
Enables and locks the LOCKUP output of CortexM0 with Break Input of TIM1/8/15/16/17
SYSCFG_Memory_Remap_Config
 #define: SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
 #define: SYSCFG_MemoryRemap_SystemMemory ((uint8_t)0x01)
 #define: SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
SYSCFG_SRAMWRP_Config
 #define: SYSCFG_SRAMWRP_Page0 SYSCFG_RCR_PAGE0
ICODE SRAM Write protection page 0
 #define: SYSCFG_SRAMWRP_Page1 SYSCFG_RCR_PAGE1
ICODE SRAM Write protection page 1
 #define: SYSCFG_SRAMWRP_Page2 SYSCFG_RCR_PAGE2
ICODE SRAM Write protection page 2
 #define: SYSCFG_SRAMWRP_Page3 SYSCFG_RCR_PAGE3
ICODE SRAM Write protection page 3

ST STM32F31xx Specifications

General

Brand	ST
Model	STM32F31xx
Category	Microcontrollers
Language	English