Circuit Descriptions
1502C MTDR Service Manual
5–11
and safe operation. Further information can be obtained by contacting your
Tektronix customer service representative. A block diagram of the option port
interface is shown in Figure 5–5.
The processor system provides all the data and control for the interface. Data,
Address, and Control lines are all buffered for increased drive. The power to the
option port is switchable to reduce power consumption, if necessary. The other
outputs are available for control and protocol purposes.
SUPPLY
CONTROLLER
BUFFERS
OUTPUT
LATCH
POWER
DATA
ADDRESS
CONTROL
SWITCHED
POWER
Figure 5–5: Option Port Interface Block Diagram
The +16 VDC and +5 VDC power outputs to the option port are switched supplies
controlled by the microprocessor system. CS14
and CS15 are used to set and clear
flip-flop U1011B. This feeds comparators U1012A and U1012B. The positive (+)
input to the comparators is set at 2.5 volts, so the CMOS flip-flop will drive the
negative (–) terminals above and below that voltage level. The comparators are
powered with a +16 VDC and a –12 VDC source to give a good output swing in
controlling the FET switches.
The output of U1012A controls the +16 VDC switch and is pulled up via a 20 k
W
resistor, R2011. The output is also passed through two 100 k
W
resistors, R2012 and
R2013, to prevent the FETs from being over-driven. Two parallel FETs, Q2011 and
Q2012, control the supply.
To reduce the instantaneous draw from the instrument supply when first turning the
switch on, capacitive feedback is used (C2016). This feedback slows the turn-on
time, allowing a capacitive load to be charged without affecting the instrument
supply. A stabilizing 100
W
resistor, R2010, is also located in the feedback loop.
Supply Control
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