Tektronix 2230

2230 Service
LIST OF ILLUSTRATIONS
Figure Page
The 2230 Digital Storage Oscilloscope..................................................................................... *
1-1 Maximum input voltage vs. frequency derating curve for CH 1 OR X,
CH 2 OR Y, and EXT INPUT connectors................................................................................. 1-14
1- 2 Physical Dimensions of the 2230 Oscilloscope.......................................................................... 1-15
2- 1 Securing the detachable power-cord to the instrument............................................................. 2-1
2-2 Optional power cord data.......................................................................................................... 2-2
2-3 Fuse holder and detachable power-cord connector................................................................... 2-2
2-4 Power and display controls and power-on indicator .................................... ; ............... 2-5
2-5 Vertical controls and connectors............................................................................................... 2-6
2-6 Horizontal controls..................................................................................................................... 2-9
2-7 Trigger controls, connector, and indicator................................................................................. 2-12
2-8 Storage controls ..................... 2-15
2-9 Rear-panel....................................................................................... 2-19
2-10 Side Panel.....................................................................................................................................2-20
2-11 X-Y Plotter interfacing ........... ......................................................................................................2-21
2-12 Crt readout display ................. 2-22
2-13 Graticule measurement markings................................................................................................ 2-23
2- 26 Probe compensation.....................................................................................................................2-26
3- 1 Simplified block diagram ....... .................................................................................................... 3-2
3-2 Block diagram of the Channel 1 Attenuator circuit.................................................................... 3-8
3-3 Store-Non Store Vertical Switching........................................................................................... 3-11
3-4 Block diagram of Trigger Amplifiers and Switching................................................................... 3-14
3-5 A Sweep Generator and Logic Circuitry.................................................................................... 3-18
3-6 Horizontal Amplifier block diagram............................................................................................ 3-24
3-7 Sampling mode acquisition timing at 0.05 ^s per division
(ADCLK = CONV = 20 MHz).................................................................................................. 3-31
3-8 MIN/MAX Acquisition timing at 20 per division..................................................................... 3-33
3-9 Acquisition Memory timing............................................................. 3-37
3-10 Clock timing..................................................................................................................................3-39
3-11 Simplified diagram of the Dc Restorer circuitry............................................. 3-50
6-1 Multi-connector holder orientation................................................. 6-7
6-2 Grounding the signal lines of P2111 and P2112 ....................................................................... 6-7
6-3 Isolated kernel timing................................................................................................................. 6-9
6-4 Diagnostic Menu...........................................................................................................................6-19
6-5 Error code timing (U4119).......................................................................................................... 6-20
6-6 PU error display............................................................................................................................6-21
6-7 Location of screws and spacers on the Storage circuit board ................................................... 6-37
6-8 Recessed screw and rear hinge removal ....................................... 6-38
6- 9 Location of screws securing Power-Supply shield and the support
bracket to the rear chassis frame ................................................. 6-40
7- 1 Option side panels...................................................................................................................... 7-4
7-2 Interface status indicators.......................................................................................................... 7-8
iv
REV DEC 1986