Tektronix 465M User Manual

Table
4-1. Attenuation
and
Gain
Switching
Sequence
VOLTS/DIV
SETTING
ATTENUATION
GAIN
REDUCTION
5
mV
IX
IX
10
mV
IX
2X
20
mV
IX
4X
50
mV
10X
IX
100
mV
10X
2X
200
mV
10X
4X
500
mV
100X
IX
IV
100X
2X
2
V
100X
4X
5
V
1000X
IX
(c)
Input
Source
Followers.
The
signal
from
the
CH 1
attenuator
is
connected
to
the
gate
of 041
24A.
The
one
megohm
input
impedance
seen at J4100
is
determined
by
R4122.
To
prevent
damage to
Q4124A
in
the
presence
of
high-amplitude
positive-going
input
signals, R4123
limits gate
current. In
the
presence
of
high-amplitude
negative-going
input
signals,
CR4124
clamps
the gate
of
Q4124A to
about
-5.7 volts and
R4123
limits
the
cur-
rent
through CR4124.
FET Q4124B
provides a
relatively
constant
current
source
for Q4124A.
(2)
CH 1 and
CH 2
Preamplifier
and
Vertical
Switching.
A
schematic
diagram
of this
circuit is
shown
in
Figure FO-3.
The
preamplifier
and
switching
circuits
are
both
contained
in one
hybrid
integrated
circuit
(U4160).
The
preamplifier
circuits
provide the
initial
stages
of
amplification
for the
vertical
input signals.
The
switching
circuit
determines
which
of the
vertical input
signals
will
be
displayed on
the crt.
(a)
CH
1
and
CH 2
Preamplifier.
The
single-ended
signals
from the
input
source
followers are
connected
to
terminals 1
and
32,
respectively of
U4160.
The
single-
ended input
signals
are converted to
paraphase
signals and
internally connected
to
the Vertical
Switching
circuit.
2
Gain
Switching. To
provide
the
vertical de-
flection factors
indicated by the
VOLTS/DIV
control,
the
gains of
the
preamplifiers are
reduced and
attenuators
are
switched into the
signal path, see
4-3.
a.
(1)
(b).
The
CH
1
gain setting resistors
are connected
from
terminals 4 and
6 to terminals
7 and
8
of U4160.
The CH
2
gain
setting
resistors are connected
from terminals 29
and 31 to
termi-
nals 26 and 27 of U4160.
The
VOLTS/DIV
switches de-
termine
which gain
setting resistors
are used.
Table
4-1
shows
the
VOLTS/DIV settings and the
attenuation
and
gain
switching needed
to
obtain
them.
2
CH
2
INVERT. The CH 2
signal can be
in-
verted
as displayed on the crt. This is done by
inverting the
AIR
FORCE
T033A1
-13-496-1
NAVELEX
0969-LP-170-0010
Operation
Instructions
signal
in
the
CH 2
Preamplifier.
The
polarity
of
the CH 2
signal is
determined
by
the dc
voltage
on
terminals 34
and
36
of
U4160.
With 0.8
volts on
terminal 34
and 0.0
volts
on
terminal
36,
the
CH 2
signal
is not
inverted.
To
invert
the
signal, the
INVERT
switch <S4240)
is
pushed,
which
sets
terminal
34 to
0.0
volts
and
terminal 36 to
0.8
volts.
(b)
Vertical
Switching.
Transistor
gates
within
U4160
allow
either the
CH 1 or
CH 2
signal
to
be con-
nected to
the
output
of U4160
(terminals 17
and
18).
The
transistor
gates are
controlled by the
Vertical
Switching
Control
circuit.
Figure
4-2
shows a
simplified
diagram
of
the
transistor
gates and the
Vertical
Switching
Control
circuit.
Figure
4-2
shows the
signal path with
the
VERT
MODE
switch
set
to
CH 1.
(c)
CH 1
and
CH 2
Trigger
Pickoff.
U4 160
sup-
plies
samples
of the
signals
present
in the
CH 1
and
CH 2
Preamplifiers to
the
trigger
circuits.
The
CH 1
trigger
signal
output
is at
terminal
13
of U4160
and
the
CH 2
trigger
signal
output
is at
terminal
22
of U4160.
(d)
CH 2
OUT
Signal
Pickoff. Terminal 21
of
U4160
supplies a
sample
of
the
signal
present in
the CH 2
Preamplifier to
the
base of
Q4282.
This
signal is
amplified
through
Q4282
and Q4288,
then
connected to
the
CH 2
OUT
connector
(J4289).
(e)
X-Axis
Signal
Pickoff. A
sample
of the
signal
present
in the
CH 1
Preamplifier
is
supplied
to
terminal
14
of U4160.
In the
X-Y
horizontal
mode, this
signal
is
connected to
the
Horizontal
Preamplifier
in
the
Horizontal
Module
and
provides
horizontal
deflection
for the crt.
(3)
Vertical
Switching
Control.
Figure
FO-3
shows
the
schematic
diagram
which
contains
the
Vertical
Switch-
ing
Control
circuitry.
Transistor
gates
within
U4160
deter-
mine
which
of the
signals
in
the CH 1
and
CH 2
Preamp-
lifiers is
supplied to
the
output
of U4160
(terminals 17 and
18).
The
CH
1
gate is
controlled
by
the
voltages
on termi-
nals 15
and
16
of
U4160.
The
CH
2
gates
are
controlled
by
the
voltages
on
terminals 19
and 20
of
U4160.
These
voltages
are
controlled
by
the
channel
switching
multi-
vibrator
and
the
VERT
MODE
switch.
(a)
Channel
Switching
Multivibrator.
The
channel
switching
multivibrator
consists
of 04316
and
Q4326.
The
multivibrator
operates
in
the CHOP
and
ALT
settings of
the
VERT
MODE
switch.
In
the CHOP
mode,
the
multi-
vibrator
is
free
running
at
about 250
kilohertz.
In the
ALT
mode it
switches
states
when
triggered by
the
alternate
trace
sync
pulse
through
04334.
(b)
CH 1
Vertical
Mode.
When
the
VERT
MODE
switch
is set to
CH
1,
-5
volts is
connected to
R4323
through
the
VERT
MODE switch S4330.
Resistors
R4323
and
R4322
form
a
divider
which
sets terminals
16
and
19
4-5

Tektronix 465M Specifications

General

Brand	Tektronix
Model	465M
Category	Test Equipment
Language	English