LMK04821
,
LMK04826
,
LMK04828
www.ti.com
SNAS605AR –MARCH 2013–REVISED DECEMBER 2015
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN MAX UNIT
V
CC
Supply voltage
(2)
–0.3 3.6 V
(V
CC
+
V
IN
Input voltage –0.3 V
0.3)
T
L
Lead temperature (solder 4 seconds) 260 °C
T
J
Junction temperature 150 °C
Differential input current (CLKinX/X*,
I
IN
± 5 mA
OSCin/OSCin*, FBCLKin/FBCLKin*, Fin/Fin*)
MSL Moisture sensitivity level 3
T
stg
Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Never to exceed 3.6 V.
7.2 ESD Ratings
VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2000
Machine Model (MM) ±150
V
(ESD)
Electrostatic discharge V
Charged-device model (CDM), per JEDEC specification JESD22-
±250
C101
(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±250 V may actually have higher performance.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN TYP MAX UNIT
T
J
Junction Temperature 125 °C
T
A
Ambient Temperature –40 25 85 °C
T
PCB
PCB Temperature (measured at thermal pad) 105 °C
V
CC
Supply Voltage 3.15 3.3 3.45 V
7.4 Thermal Information
LMK0482x
THERMAL METRIC
(1)
NKD (WQFN) UNIT
64 PINS
R
θJA
Junction-to-ambient thermal resistance
(2)
24.3 °C/W
R
θJC(top)
Junction-to-case (top) thermal resistance
(3)
6.1 °C/W
R
θJB
Junction-to-board thermal resistance
(4)
3.5 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case(top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard
test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: LMK04821 LMK04826 LMK04828
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