Texas Instruments TMS570LS0714

SPISOMI
Slave Out Data Is Valid
SPICLK
(clock polarity=0)
SPICSn
8
SPICLK
(clock polarity=1)
SPIENAn
9
10
SPISIMO
SPISOMI
5
7
SPISIMO Data
Must Be Valid
SPISOMI Data Is Valid
666
SPICLK
(clock polarity = 1)
SPICLK
(clock polarity = 0)
3
2
1
4
143
TMS570LS0714
www.ti.com SPNS226E –JUNE 2013–REVISED NOVEMBER 2016
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Peripheral Information and Electrical SpecificationsCopyright © 2013–2016, Texas Instruments Incorporated
Figure 7-26. SPI Slave Mode External Timing (CLOCK PHASE = 1)
Figure 7-27. SPI Slave Mode Enable Timing (CLOCK PHASE = 1)