Texas Instruments TMS570LS0714

Copyright © 2013–2016, Texas Instruments IncorporatedTerminal Configuration and Functions
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TMS570LS0714
SPNS226E –JUNE 2013–REVISED NOVEMBER 2016 www.ti.com
(1) The CTRLx columns contain a value of type x[y], which indicates the pin multiplexing control x register (PINMMRx) and the associated bit field [y].
Table 4-38. Multiplexing for Outputs on 100-Pin PZ Package
(1)
100-PIN
PZ
DEFAULT
FUNCTION
CTRL1 OPTION 2 CTRL2 OPTION 3 CTRL3 OPTION 4 CTRL4 OPTION 5 CTRL5 OPTION 6 CTRL6
2 GIOA[1]/INT[1] 1[0]
5 GIOA[2]/INT[2] 2[0] N2HET2[0] 2[3] EQEP2I 2[4]
10 GIOA[5]/INT[5] 2[24] EXTCLKIN1 2[25] EPWM1A 2[26]
12 GIOA[6]/INT[6] 3[16] N2HET2[4] 3[17] EPWM1B 3[18]
18 GIOA[7]/INT[7] 4[0] N2HET2[6] 4[1] EPWM2A 4[2]
73 MIBSPI1NCS[0] 13[24] MIBSPI1SOMI[1] 13[25] ECAP6 13[28]
93 MIBSPI1NCS[1] 20[16] N2HET1[17] 20[17] EQEP1S 20[20]
27 MIBSPI1NCS[2] 8[8] N2HET1[19] 8[9]
68 MIBSPI1NENA 12[16] N2HET1[23] 12[17] ECAP4 12[20]
36 MIBSPI3CLK 33[24] AWM1_EXT_SEL[1] 33[25] EQEP1A 33[26]
38 MIBSPI3NCS[0] 9[16] AD2EVT 9[17] GIOB[2] 9[18] EQEP1I 9[19]
37 MIBSPI3NENA 9[8] MIBSPI3NCS[5] 9[9] N2HET1[31] 9[10] EQEP1B 9[11]
35 MIBSPI3SIMO[0] 33[16] AWM1_EXT_SEL[0] 33[17] ECAP3 33[18]
34 MIBSPI3SOMI[0] 33[8] AWM1_EXT_ENA 33[9] ECAP2 33[10]
19 N2HET1[0] 5[0] SPI4CLK 5[1] EPWM2B 5[2]
22 N2HET1[02] 5[8] SPI4SIMO 5[9] EPWM3A 5[10]
25 N2HET1[04] 33[0] EPWM4B 33[1]
26 N2HET1[06] 7[16] SCIRX 7[17] EPWM5A 7[18]
74 N2HET1[08] 14[0] MIBSPI1SIMO[1] 14[1]
83 N2HET1[10] 17[0] nTZ3 17[4]
97 N2HET1[16] 34[0] EPWM1SYNCI 34[1] EPWM1SYNCO 34[2]
98 N2HET1[18] 34[8] EPWM6A 34[9]
64 N2HET1[24] 11[24] MIBSPI1NCS[5] 11[25]