Texas Instruments TMS570LS0714 User Manual

64
TMS570LS0714
SPNS226E –JUNE 2013–REVISED NOVEMBER 2016 www.ti.com
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System Information and Electrical Specifications Copyright © 2013–2016, Texas Instruments Incorporated
Table 6-20. Device Memory Map (continued)
MODULE NAME
FRAME CHIP
SELECT
FRAME ADDRESS RANGE
FRAME
SIZE
ACTUAL
SIZE
RESPONSE FOR ACCESS TO
UNIMPLEMENTED LOCATIONS IN
FRAME
START END
System Modules Control Registers and Memories
DMA RAM PPCS0 0xFFF8_0000 0xFFF8_0FFF 4KB 4KB Abort
VIM RAM PPCS2 0xFFF8_2000 0xFFF8_2FFF 4KB 1KB
Wrap around for accesses to
unimplemented address offsets between
1KB and 4KB.
Flash Module PPCS7 0xFFF8_7000 0xFFF8_7FFF 4KB 4KB Abort
eFuse Controller PPCS12 0xFFF8_C000 0xFFF8_CFFF 4KB 4KB Abort
Power Management
Module (PMM)
PPSE0 0xFFFF_0000 0xFFFF_01FF 512B 512B Abort
PCR registers PPS0 0xFFFF_E000 0xFFFF_E0FF 256B 256B Reads return zeros, writes have no effect
System Module -
Frame 2
(see device TRM)
PPS0 0xFFFF_E100 0xFFFF_E1FF 256B 256B Reads return zeros, writes have no effect
PBIST PPS1 0xFFFF_E400 0xFFFF_E5FF 512B 512B Reads return zeros, writes have no effect
STC PPS1 0xFFFF_E600 0xFFFF_E6FF 256B 256B
Generates address error interrupt, if
enabled
IOMM Multiplexing
Control Module
PPS2 0xFFFF_EA00 0xFFFF_EBFF 512B 512B Reads return zeros, writes have no effect
DCC1 PPS3 0xFFFF_EC00 0xFFFF_ECFF 256B 256B Reads return zeros, writes have no effect
DMA PPS4 0xFFFF_F000 0xFFFF_F3FF 1KB 1KB Reads return zeros, writes have no effect
DCC2 PPS5 0xFFFF_F400 0xFFFF_F4FF 256B 256B Reads return zeros, writes have no effect
ESM PPS5 0xFFFF_F500 0xFFFF_F5FF 256B 256B Reads return zeros, writes have no effect
CCMR4 PPS5 0xFFFF_F600 0xFFFF_F6FF 256B 256B Reads return zeros, writes have no effect
RAM ECC even PPS6 0xFFFF_F800 0xFFFF_F8FF 256B 256B Reads return zeros, writes have no effect
RAM ECC odd PPS6 0xFFFF_F900 0xFFFF_F9FF 256B 256B Reads return zeros, writes have no effect
RTI + DWWD PPS7 0xFFFF_FC00 0xFFFF_FCFF 256B 256B Reads return zeros, writes have no effect
VIM Parity PPS7 0xFFFF_FD00 0xFFFF_FDFF 256B 256B Reads return zeros, writes have no effect
VIM PPS7 0xFFFF_FE00 0xFFFF_FEFF 256B 256B Reads return zeros, writes have no effect
System Module -
Frame 1
(see device TRM)
PPS7 0xFFFF_FF00 0xFFFF_FFFF 256B 256B Reads return zeros, writes have no effect
6.9.3 Special Consideration for CPU Access Errors Resulting in Imprecise Aborts
Any CPU write access to a Normal or Device type memory, which generates a fault, will generate an
imprecise abort. The imprecise abort exception is disabled by default and must be enabled for the CPU to
handle this exception. The imprecise abort handling is enabled by clearing the "A" bit in the CPU program
status register (CPSR).

Texas Instruments TMS570LS0714 Specifications

General

Brand	Texas Instruments
Model	TMS570LS0714
Category	Microcontrollers
Language	English