It contains two sections, the keyboard and the display
module. The circuitry on the keyboard interacts with the
front panel interface and will be included in the discus-
sion of that circuit. The display module however inter-
faces directly with the microprocessor.
The display module consists of a 16 character by 2 line
liquid crystal dot matrix display with built in intelligent
microprocessor bus interface. The microprocessor trans-
fers data to and from the display module via its data bus,
AD7-ADO
(J10 pins 14-7). When the microprocessor
accesses the display module, the address decoder pulls
-
DISP (U2B pin 3) low. This line is gated with the "E" clock
by the 'and' gate U6B to create the display enable, DE
(J10 pin 6). The data to be transferred is valid on the fall-
ing edge of DE.
R/~(JI 0 pin 5)determines read or write
cycles just as with any other microprocessor peripheral
device. The microprocessor uses the least significant
address line (ADRO) to select between the command
register and the data register of the display drivers. The
command register clears the display, moves the cursor,
etc, while the data register selects the characters to be
displayed.
and
R28. As the wiper contacts the stripe it is pulled low.
As
theshaft is rotated, two pulse trains, godegreesapart
appear on the wipers. The phase difference between the
wipers is either
+
90 degrees or
-
90 degrees depend-
ing on the direction of rotation.
The pulses from the encoder (CPREl and
CPRE2) are
interfaced to the microprocessor by a knob interrupt cir-
cuit. This circuit is comprised of the logic gates
U34B,
U34C, U8C, U35B, U35A, UIOB, and U2E along with the
transistor
Q1. When the knob is rotated, one of the
encoder lines changes state. This causes U2E pin 10 to
go high which turns on
Q1 and interrupts the micro-
processor.
Whenan interrupt occurs,~(U2Epin 11)
goes low, latching IRQ
(Q1 collector) low until the inter-
rupt can be serviced. When the interrupt is serviced, the
-
microprocessor reads the status of KIRQ (U33 pin 2) to
determine if the knob was the source of the interrupt.
If
it was, the microprocessor compliments KM (U8C pin
5) which prohibits the knob input that just changed from
causing another interrupt. This acts as a
debounce and
provides hysteresis for the knob inputs. The microproc-
essor also reads the status of CPREl and
CPRE2 using
The liquid crystal requires a
DC
drive voltage to provide
the input port of U33. Based on the status of these lines,
its
contrast,
J1
pin
(DD)
provides
this
voltage
and
is
knobdirection is calculated. The microprocessor writes
set by the LCD viewing control on the front panel. As this
the compliment of CPREl and
CPRE2 to KWl (U34B pin
voltage changes, the intensity of the liquid crystal
4,
and Kw2 (U34C pin lo) This resets the
changes, essentially altering the optimum viewing angle.
so that the next transition
can
be recognized
The
resistors,
R29
and
R30
provide
the
biasing
for
the
the circuit. After the interrupt has been serviced, the
viewing angle control.
microprocessor pulses RKIRQ
(UlOB pin 3) low which
sets IRQ
(Q1 collector) high again and clears the knob
The front panel interface can be divided into twosections,
interrupt
circuit,
The
circuit
is
now
ready
to
accept
the
the front panel keys and the control knob. There are eleven
next
transition
of
the
knob
inputs,
conductive rubber keys which interface to the
microprocessor through
tho octal buffers (U32 and U33).
These buffers act as input ports to the microprocessor
data bus (AD7-ADO). The outputs of the buffers are in a
high impedance state unless the enable on pins 1 and 19
is pulled low. The inputs to the buffers from the keys are
pulled high by the resistor networks
RN1 and RN2. When
a key is pressed, it connects the buffer input to ground
through the small key resistance. At regular intervals the
microprocessor reads the keyboard input ports. When this
happens the addressdecoder pulls the enable (INOEIV or
IN1 EN) of the appropriate buffer low and the data on the
inputs is transferred to the microprocessor data bus.
An input to the Return In connector is routed to these input
ports by the trigger and hold logic. This signal,
TS (U33
pin 4) is then treated as a key press.
The control knob on the front panel turns a conductive
plastic rotary encoder. The encoder is constructed as two
concentric striped conductive rings whose stripes are off-
set relative to each other. The conductive stripes are con-
nected to ground. Each ring has a separate wiper (CPREl
and
CPRE2) which is pulled high through resistors R27
4.2.3.8
Control Shift Register
Refer to schematic 01 03-00-1 456, sheet 2. The control
shift register converts the serial data from the
microprocessor to into 32 parallel control lines. These
control
Iinesdirect thededicatedcircuitsfor amplitude,
offset and mode control, and the Z-Axis driver. The com-
ponents of the circuit are; one triple 2-channel analog
multiplexer
(U11)and four 8 bit shift registers (U14, U13,
U18 and
U19).
The 8 bit shift registers are cascaded into a 32 bit serial
to parallel converter. When the microprocessor writes
to this circuit it sends a 32 bit serial string on the line
SERD (U14 pin 2). With each bit the microprocessor
pulses SERC (U14 pin 3) to clock the bit into the shift
register.
As the data is shifted through the shift register, it car-
ries out from pin 9 to the data input of the next register
(pin 2). Once all 32 bits have been shifted in, the
microprocessor pulses ANLE (U14 pin
1) high which
transfers the new data to the outputs and latches it there.
Scans
by
ArtekMedia
O
2006
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