General Procedures and Information
Phaser 3435 5/08 6-25
-Output Voltage Control Method: Transfer Output Voltage is outputted and controlled by
changing Duty of THVPWM Signal. 10% Duty: +650V, 90% Duty: +5KV 5%
• Charge Voltage (MHV)
-Input Voltage: 24 V DC 15%
-Output Voltage: -1.3KV ~ -1.8KV DC 50V
-Output Voltage Rising Time: 50 ms Max
-Output Voltage Falling Time: 50 ms Max
-Output Loading range: 30 M ~ 1000 M
-Output Control Signal(MHV-PWM): CPU is HV output when PWM is Low
• Cleaning Voltage (THV-)
-The (+) Transfer Voltage is not outputted because the THV PWM is controlled with high.
-The (-) Transfer Voltage is outputted because the THV-Enable Signal is controlled with low
-The output fluctuation range is big because there is no Feedback control.
• Developing Voltage (DEV)
-Input Voltage: 24 V DC 15%
-Output Voltage: -200V ~ -600V DC 20 V
-Output Voltage Fluctuation range: PWM Control
-Input contrast of the output stability degree: 5% or less
Loading contrast: 5% or less
-Output Voltage Rising Time: 50 ms Max
-Output Voltage Falling Time: 50 ms Max
-Output Loading range: 10M ~ 1000 M
-Output Control Signal (BIAS-PWM): the CPU output is HV output when PWM is low.
• Supply
- Output Voltage: -400 V ~ -800V DC 50 V(ZENER using, DEV)
-Input contrast of the output stability degree: under 5% Loading contrast: 5% or less
-Output Voltage Rising Time: 50 ms Max
-Output Voltage Falling Time: 50 ms Max
-Output Loading range: 10 M ~ 1000 M
-Output Control Signal (BIAS-PWM): the CPU is HV output when PWM is low.
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