Xilinx Spartan-3E User Manual

142 www.xilinx.com Spartan-3E Start Kit Board User Guide
UG230 (v1.0) March 9, 2006
Appendix A: Schematics
R
FPGA I/O Banks 0 and 1, Oscillators
IC10B0 represents the connections to I/O Bank 0 on the FPGA. The VCCO input to Bank 0
is 3.3V by default, but can be set to 2.5V using jumper JP9.
IC10B1 represents the connections to I/O Bank 1 on the FPGA.
IC17 is the 50 MHz clock oscillator. Chapter 3, “Clock Sources,” for additional information.
IC16 is an 8-pin DIP socket to insert an alternate clock oscillator with a different frequency.

Xilinx Spartan-3E Specifications

General

Brand	Xilinx
Model	Spartan-3E
Category	Motherboard
Language	English