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Xilinx Spartan-3E - Power Supply Decoupling

Xilinx Spartan-3E
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146 www.xilinx.com Spartan-3E Start Kit Board User Guide
UG230 (v1.0) March 9, 2006
Appendix A:
Schematics
R
Power Supply Decoupling
IC10PWR represents the various voltage supply inputs to the FPGA and shows the power
decoupling network.
Jumper JP9 defines the voltage applied to VCCO on I/O Bank 0. The default setting is 3.3V.
See “Voltage Control,” page 22 and Voltage Supplies to the Connector, page 114 for
additional details.

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