Xilinx Spartan-3E User Manual

Spartan-3E Starter Kit Board User Guide www.xilinx.com 57
UG230 (v1.0) March 9, 2006
UCF Location Constraints
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UCF Location Constraints
Figure 6-4 provides the UCF constraints for the VGA display port, including the I/O pin
assignment, the I/O standard used, the output slew rate, and the output drive current.
Related Resources
• VESA
http://www.vesa.org
• VGA timing information
http://www.epanorama.net/documents/pc/vga_timing.html
Figure 6-4: UCF Constraints for VGA Display Port
NET "VGA_RED" LOC = "H14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "VGA_GREEN" LOC = "H15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "VGA_BLUE" LOC = "G15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "VGA_HSYNC" LOC = "F15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "VGA_VSYNC" LOC = "F14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;

Xilinx Spartan-3E Specifications

General

Brand	Xilinx
Model	Spartan-3E
Category	Motherboard
Language	English