Xilinx Spartan-3E User Manual

Spartan-3E Starter Kit Board User Guide www.xilinx.com 91
UG230 (v1.0) March 9, 2006
Configuring from SPI Flash
R
Creating an SPI Serial Flash PROM File
The following steps describe how to format an FPGA bitstream for an SPI Serial Flash
PROM.
Setting the Configuration Clock Rate
The FPGA supports a 12 MHz configuration clock rate when connected to an M25P16 SPI
serial Flash. Set the Properties for Generate Programming File so that the
Configuration Rate is 12, as shown in Figure 12-5. See “Generating the FPGA
Configuration Bitstream File” in the FPGA Configuration Options chapter for a
more detailed description.
Regenerate the FPGA bitstream programming file with the new settings.
Figure 12-5: Set Configuration Rate to 12 MHz When Using the M25P16 SPI Flash
UG230_c15_04_030206

Xilinx Spartan-3E Specifications

General

Brand	Xilinx
Model	Spartan-3E
Category	Motherboard
Language	English