Advantech ARK-6310 - TMDS DVI Connector (JTMDS1 on ARK-6310-3 M01 E;02 E)

ARK-6310 User Manual 26
2.7.11 TMDS DVI Connector (JTMDS1 on ARK-6310-3M01E/02E)
Signal Description - TMDS Connector (JTMDS1 on ARK-6310-3M01E/02E)
Table 2.13: TMDS DVI Connector (JTMDS1 on ARK-6310-3M01E/02E)
Signal PIN PIN Signal
+5V 2 1 TDC0#
GND 4 3 TDC0
NC 6 5 NC
NC 8 7 NC
HPDET 10 9 TDC1#
TMDSDATA 12 11 TDC1
TMDSDCLK 14 13 NC
GND 16 15 NC
TLC# 18 17 TDC2#
TLC 20 19 TDC2
Table 2.14: Signal Description - TMDS Connector (JTMDS1)
Signal Type Signal Description
TDC0, TDC0# O DVI Data Channel 0 Outputs: These pins provide the DVI differen-
tial outputs for data channel 0 (blue).
TDC1, TDC1# O DVI Data Channel 1 Outputs: These pins provide the DVI differen-
tial outputs for data channel 1 (green).
TDC2, TDC2# O DVI Data Channel 2 Outputs: These pins provide the DVI differen-
tial outputs for data channel 2 (red).
HPDET I Hot Plug Detect (internal pull-down): This input pin determines
whether the DVI is connected to a DVI monitor. When terminated,
the monitor is required to apply a voltage greater than 2.4 volts.
Changes on the status of this pin will be relayed to the graphics
controller via the P-OUT/TLDET* or GPIO (1)/TLDET* pin pulling
low.
TMDSDATA I/O DVO I2C Data: This signal is used as the I2C_DATA for a digital
display (i.e. TV-Out Encoder, TMDS transmitter). This signal is tri-
stated during a hard reset.
TMDSDCLK I/O DVI DDC Clock: This signal is used as the DDC clock for a digital
display connector (i.e. primary digital monitor). This signal is tri-
stated during a hard reset.
TLC, TLC# O DVI Clock Outputs: These pins provide the differential clock out-
puts for the DVI interface corresponding to data on TDC (0:2) out-
puts.