7- 4
Operating Concepts
System Operation
The Built-In Synthesized Source
The analyzer's built-in synthesized source produces a swept RF signal or CW (continuous wave) signal in
the range of:
• 8753ES: 30 kHz to 3.0 GHz (with Option 006: 30 kHz to 6.0 GHz)
• 8753ET: 300 kHz to 3.0 GHz (with Option 006: 300 kHz to 6.0 GHz)
The RF output power is leveled by an internal ALC (automatic leveling control) circuit. To achieve frequency
accuracy and phase measuring capability, the analyzer is phase locked to a highly stable crystal oscillator.
For this purpose, a portion of the transmitted signal is routed to the R channel input of the receiver, where it
is sampled by the phase detection loop and fed back to the source. Some portion of the RF source signal
must always be sent to the R channel input. The level must be between 0 dB and 35 dBm.
The Source Step Attenuator
The step attenuator contained in the source is used to adjust the power level to the test device without
changing the level of the incident power in the reference path.
The Built-In Test Set
The 8753ES features a built-in test set that provides signal-separation devices and connections to the device
under test. The signal separation devices are needed to separate the incident signal from the transmitted
and reflected signals. The incident signal is applied to the R channel input through a jumper cable on the
front panel. Meanwhile, the transmitted and reflected signals are internally routed from the test port
couplers to the inputs of the A and B sampler/mixers in the receiver. Port 1 is connected to the A input and
port 2 is connected to the B input. A transfer switch routes the source output power to either port 1 or 2,
allowing measurements to be made in both the forward and reverse directions.
The 8753ET features a built-in test set that provides signal-separation and connections to the device under
test. Part of the source output is coupled off and applied to the R input as the incident signal. The reflected
signal is routed from the port 1 coupler to the input of the A sampler. The transmitted signal is routed from
port 2 to the B sampler input.
The Receiver Block
The receiver block contains three sampler/mixers for the R, A, and B inputs. The signals are sampled, and
mixed to produce a 4 kHz IF (intermediate frequency). A multiplexer sequentially directs each of the three IF
signals to the ADC (analog to digital converter) where it is converted from an analog to a digital signal. The
signals are then measured and processed for viewing on the display. Both amplitude and phase information
are measured simultaneously, regardless of what is displayed on the analyzer.