1 INTRODUCTION
1.1 General
This document comprises the User’s Manual for the ANET3910-EN standalone Ethernet
based module. The document covers the hardware and software installation, the board
connections, the technical data and a general description of the hardware architecture.
For programming information please refer to the documents listed in the ‘Applicable
Documents’ section.
The ANET3910-EN modules are members of AIM's new family of advanced Ethernet
connected standalone modules for analysing, simulating, monitoring and testing of
avionic data bus systems.
The ANET3910-EN modules are used to simulate, monitor and inject protocol errors of
STANAG-3910 based data bus systems. The ANET3910-EN offers an interface for one
dual-redundant STANAG-3910 bus. Furthermore the interface implements trigger
IN/OUT functions, as well as 8 user definable Discrete I/O signals.
An freewheeling IRIG-B-122 compatible time code Encoder/Decoder allows the user to
synchronize to either the self-generated time code or the time code of an external board
with a resolution of 1µsec, to satisfy the requirements of 'multi-channel time tag
synchronization' on system level.
The ANET3910-EN module is designed as a standalone module connected with an
Ethernet link to a host computer. An external power supply (wall adapter) is used to
power the ANET module.
For the STANAG3838 part, different coupling modes such as “Transformer Coupling”,
“Network Emulation” and “Direct Coupling” are available for each MILbus channel and
can be programmed using the on board relays.
The hardware architecture provides ample resources (i.e. processing capability and
memory) to guarantee, that all specified interface functions are available concurrently
and to full performance specifications.
The key components of the ANET3910-EN are the FPGA/SoC (which includes the 3838
core, 3910 core, the Global RAM I/F, the LS-BIU I/F, the HS-BIU Processor and the
Application Support Processor (ASP) which is running under an embedded LINUX
Operating System) and the ARM based LS-BIU-Processor.
The SoC hardware offers a built-in 10/100/1000Mbit/s Ethernet interface, which is used
for the implementation of the host connection via a Standard Ethernet RJ-45 connector.
Furthermore the SoC also offers a built-in USB interface, which has been made
available to the user for mounting external mass data storage devices or use an
optional WLAN stick for wireless Ethernet operation
With the Global RAM (shared between BIU, HOST and ASP) and the ASP Local RAM
plus the ASP Flash memory, the ANET3910-EN Design offers enough memory
resources for various use cases and applications.
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