Aim STANAG3910 User Manual

7. Technical DATA
ANET3910-EN Users Manual
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7 TECHNICAL DATA
Memory
DDR3-RAM (local ASP RAM)
- 1Gbyte
SSRAM (Global RAM)
- 16MByte
SPI-Flash for LS- BIU Processor
- 1Mbyte
NAND Flash for ASP Processor/ SoC
- 512Mbyte
System Interface
EEPROM for NovRAM
- 1KByte
10/100/1000Mbit/s IEEE802.3 standard Ethernet interface
Processors
Dual Core RISC Processor @800MHz for HS-BIU & ASP, 400MHz
RISC Processor for LS-BIU
STANAG3838
Encoder
Manchester Encoder with Parity generator and error injection
Single implementation with bus switching logic (not redundant)
Response time support via eight bit timer with 250ns resolution
Error Injection
Parity error on selected word
SYNC pattern definable on half bit basis on selectable word
Manchester stuck at low or high error in selected word and bit
position
Gap error between selected words for 0.5 to 7.5 µs in 0.5µs steps
Bit count error on selected word +/- 3 bits
Parity error on selected word
STANAG3838
Decoder
Manchester Decoder with Parity checker and error detection.
Single implementation with bus switching logic (not redundant).
Full error detection and indication
inter word gap timer with 250ns resolution (nine bit).
STANAG3910
Encoder
Manchester Encoder with FCS Generator and error injection.
Single Implementation with bus switching logic (not redundant)
Transmitter Initialize Time programmable with 250ns resolution
Preamble count programmable from 0 to 255
Error Injection
- Start and End Delimiter error
- Manchester error (Bit High and Bit Low) on programmable bit
position
- Gap insertion (100ns) on programmable word
- FCS error (inverted bit) on programmable bit position
STANAG3910
Manchester Decoder with FCS check and error detection

Aim STANAG3910 Specifications

General

Brand	Aim
Model	STANAG3910
Category	Control Unit
Language	English