AMD Vega 10 User Manual

2.3.2.2 DisplayPort (DP) and Embedded DisplayPort (eDP) Features
• Supports all the mandatory features of the DisplayPort Standard Version 1.4
and the following optional features on all links:
• HBR3 (8.1 Gbps) support
• HDR protocol support
• ACM packet-type support
• ISRC packet-type support
• DisplayPort Multi-streaming Transport (MST) allowing up to four display
pipelines to drive a single DisplayPort interface (provided the DisplayPort link
bandwidth is not exceeded)
• Supports AMD FreeSync™ technology, which dynamically synchronizes the
refresh rate of a display with the frame rate of the GPU:
• Based on DisplayPort Adaptive-Sync technology
• Requires at least one display that is capable of DisplayPort Adaptive-Sync
technology
• Each DisplayPort link can support three options for the number of lanes and
four options for link-data rate as follows:
• Four, two, or one lane(s)
• 8.1*-, 5.4-, 2.7-, or 1.62-Gbps link-data rate per lane
• The eDP mode port also supports the 4.32-, 3.24-, 2.43-, or 2.16-Gbps link
rate option
10 Functional Overview
"Vega 10" Databook
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AMD Confidential - Do not duplicate.

AMD Vega 10 Specifications

General

Process Size	14 nm
Transistor Count	12.5 billion
Memory Type	HBM2
GPU	Vega 10
Stream Processors	4096
Texture Units	256
ROPs	64
Memory Size	8 GB
Die Size	486 mm²
Memory Bandwidth	483.8 GB/s
Compute Units	64
FP32 (float) Performance	12.66 TFLOPS
Memory Bus	2048-bit