AMD Vega 10 - Table 3-7 Displayport Interface

Table 3–7 DisplayPort Interface
Pin Name Type Description
TX[5:3]P/M_DPA[0:2]P/N
TXCAP/M_DPA3P/N
O
DisplayPort (DPA) differential signals.
DPA can be configured as a DisplayPort link.
A 100-nF capacitor is required on each differential signal placed
near the connector.
TX[2:0]P/M_DPB[0:2]P/N
TXCBP/M_DPB3P/N
O
DisplayPort (DPB) differential signals.
DPB can be configured as a DisplayPort link.
A 100-nF capacitor is required on each differential signal placed
near the connector.
TX[5:3]P/M_DPC[0:2]P/N
TXCCP/M_DPC3P/N
O
DisplayPort (DPC) differential signals.
DPC can be configured as a DisplayPort link.
A 100-nF capacitor is required on each differential signal placed
near the connector.
TX[2:0]P/M_DPD[0:2]P/N
TXCDP/M_DPD3P/N
O
DisplayPort (DPD) differential signals.
DPD can be configured as a DisplayPort link.
A 100-nF capacitor is required on each differential signal placed
near the connector.
TX[5:3]P/M_DPE[0:2]P/N
TXCEP/M_DPE3P/N
O
DisplayPort (DPE) differential signals.
DPE can be configured as a DisplayPort link.
A 100-nF AC-coupling capacitor is required on each differential
signal placed near the connector.
TX[2:0]P/M_DPF[0:2]P/N
TXCFP/M_DPF3P/N
O
DisplayPort (DPF) differential signals.
DPF can be configured as a DisplayPort link.
A 100-nF AC-coupling capacitor is required on each differential
signal placed near the connector.
AUX[2:1]P/N
DDCAUX[6:3]N
DDCAUX[6:3]P
I/O
DisplayPort auxiliary differential signals.
See Table 3–14 (p. 31)
AUX_ZVSS
A
Analog calibration.
Connect to VSS through a 150-Ω (1%) resistor.
DP_ZVDD_08
A
Analog calibration.
Connect to VDD_080 through a 200-Ω (1%) resistor.
DP_ZVSS
A
Analog calibration.
Connect to GND through a 200-Ω (1%) resistor.
Signal Descriptions 25
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