Pin Name Type Description
TEMPINRETURN
1
I
TEMPINRETURN: A provision to connect to the cathode of an external
thermal diode (or emitter of NPN transistor) for the GPU to read the
temperature from a spot of interest on the board or platform.
PROCHOT_L
I/O Active low.
Can be configured as input to receive thermal interrupt from the external
thermal sensor.
Can be configured as output (open drain) to inform the system that the
GPU die temperature is above a certain threshold.
FANOUT
O Fan speed control output.
Fan drive output (output to control fan). In PWM mode, the PWM
frequency is 15 kHz to 50 kHz.
Provide a 10-KΩ pull-down resistor to ground.
FANIN
I Fan speed input.
CTF
O Critical temperature fault (CTF) (active high) will output 3.3 V if the on-
die temperature sensor exceeds a critical temperature so that the
graphics card or platform can protect the GPU from damage by removing
power.
If CTF is expected to be latched at “high” level upon occurrence of the
CTF event, 1.8 V and 3.3 V to the GPU must remain.
The CTF setpoint is 91℃ for air cooled designs, and 76℃ for liquid cooled
designs.
ALERT_L
I/O For debug purposes. Not connected on the PCB.
PUMPIN
I Pump speed input from the liquid cooled solution. Regular 3.3 V TACH
input.
PUMPOUT
O Pump speed control output to the liquid cooled solution.
Provide a 10-KΩ pull-down resistor to ground.
1. Route the two signals differentially; kept away from high-speed switching signals.
Total resistance of the nets including return path should be less than 1 Ω.
Add a filter capacitor between TEMPIN and TEMPINRETURN as close to the GPU as
possible.
3.17 SMBus Interface
Table 3–18 SMBus Interface
Pin Name Type Description
SMBDAT
I/O SMBus Data: Connected to the SMBDAT line of the SMBus master with an external
pull-up resistor to 3.3 V.
SMBus Clock: Connected to the SMBCLK line of the SMBus master with an external
pull-up resistor to 3.3 V.
Supports the SMBus 2.0 protocol.
The SMBus slave address can be set to either 0×40 or 0×41 through pin strap on
GPIO_19. For more details, see Table 3–24 (p. 38).
AMD reserves SMBUS slave address 0×4C for testing purpose. Platform must not
communicate with GPU, or any device on the same SMBUS as GPU, using slave
address 0×4C.
The GPU also supports ARP.
SMBCLK
I/O
34 Signal Descriptions
"Vega 10" Databook
56006_1.00
© 2017 Advanced Micro Devices, Inc.
AMD Confidential - Do not duplicate.
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