ARM ARM7TDMI Hardware Reference Guide

Open Access
A-9
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
Board Schematics
A.8 DRAM ASB Slave
Date: February 26, 1996 Sheet
Size Document Number
B ARM EOI-0011B (DRAM
.
Title
DRAM ASB Slave
CB1 4JN
Cambridge
Cherry Hinton
Fulbourn Road
(c) ADVANCED RISC MACHI
N
1
2
3
4
5
6
7
8
9
1
0
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
3
0
3
1
3
2
3
3
3
4
3
5
3
6
3
7
3
8
3
9
4
0
4
1
4
2
4
3
4
4
4
5
4
4
7
4
4
9
5
0
5
1
5
2
5
3
5
4
5
5
5
6
5
7
5
8
5
9
6
0
6
1
6
2
6
3
6
4
6
5
6
6
7
6
8
6
7
7
7
2
GND
1
D[00]
2
D[16]
3
D[01]
4
D[17]
5
D[02]
6
D[18]
7
D[03]
8
D[19]
9
VCC
10
NC
11
RA[00]
12
RA[01]
13
RA[02]
14
RA[03]
15
RA[04]
16
RA[05]
17
RA[06]
18
RA[10]
19
D[04]
20
D[20]
21
D[05]
22
D[21]
23
D[06]
24
D[22]
25
D[07]
26
D[23]
27
RA[07]
28
NC
29
VCC
30
RA[8]
31
RA[9]
32
RAS1
33
RAS0
34
PUDP2
35
PUDP0
36
PUDP1
37
PUDP3
38
GND
39
CAS0
40
CAS2
41
CAS3
42
CAS1
43
RAS0
44
RAS1
45
NC
46
WE
47
NC
48
D[08]
49
D[24]
50
D[09]
51
D[25]
52
D[10]
53
D[26]
54
D[11]
55
D[27]
56
D[12]
57
D[28]
58
VCC
59
D[29]
60
D[13]
61
D[30]
62
D[14]
63
D[31]
64
D[15]
65
NC
66
PD0
67
PD1
68
NC
69
NC
70
NC
71
GND
72
SK2
DRAM SIMM
RAMVCC
M_D0
M_D1
M_D2
M_D3
M_D4
M_D16
M_D17
M_D18
M_D19
M_D20
GND
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA10
C28
10u
C29
10u
C44
10u
C45
10u
RAMVCC
M_D0
M_D1
M_D2
M_D3
M_D4
M_D16
M_D17
M_D18
M_D19
M_D20
GND
RAMVCC
RAMVCC
RAMVCC
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA10
GND
GND
SEPARATE VCC FOR DRAM
COUPLED TO VCC WITH
2 PARALLEL INDUCTORS
EACH SIMM DECOUPLED WITH:
3 10u TANTS
2 10n DEC CAPS
C27
10u
C43
10u
L1
22uH
L2
22uH
RAMVCC
RAMVCC
VCC
VCC
M_D[31..0]
B_SIZE[1..0]
B_WRITE
B_WAIT
B_RES0
D_SELDRAM
BIGEND
nOEMD
nOEBD
B_A[25..0]
B_LAST
REFCLK
nB_CLK0
M_D[31..0]
B_SIZE[1..0]
B_WRITE
B_RES0
D_SELDRAM
BIGEND
B_WAIT
nOEMD
nOEBD
B_A[25..0]
B_LAST
REFCLK
nB_CLK0
DRAM CONTROLLER
1
V51
IO8
12
IO9
13
IO10
14
IO11
15
IO12
16
IO13
17
IO14
18
IO15
19
CLK0/I0
20
VCC
21
GND
22
CLK1/I1
23
IO16
24
IO17
25
IO18
26
IO19
27
IO20
28
IO21
29
IO22
30
IO23
31
GND
32
I
O
2
4
3
3
I
O
2
5
3
4
I
O
2
6
3
5
I
O
2
7
3
6
I
O
2
8
3
7
I
O
2
9
3
8
I
O
3
0
3
9
I
O
3
1
4
0
I
2
4
1
V
C
C
4
2
G
N
D
4
3
V
C
C
4
4
I
O
3
2
4
5
I
O
3
3
4
6
I
O
3
4
4
7
I
O
3
5
4
8
I
O
3
6
4
9
I
O
3
7
5
0
I
O
3
8
5
1
I
O
3
9
5
2
G
N
D
5
3
IO40
54
IO41
55
IO42
56
IO43
57
IO44
58
IO45
59
IO46
60
IO47
61
CLK2/I3
62
VCC
63
GND
64
CLK3/I4
65
IO48
66
IO49
67
IO50
68
IO51
69
IO52
70
IO53
71
IO54
72
IO55
73
GND
74
I
O
5
6
7
5
I
O
5
7
7
6
I
O
5
8
7
7
I
O
5
9
7
8
I
O
6
0
7
9
I
O
6
1
8
0
I
O
6
2
8
1
I
O
6
3
8
2
I
5
8
3
V
C
C
8
4
G
N
D
1
V
C
C
2
I
O
0
3
I
O
1
4
I
O
2
5
I
O
3
6
I
O
4
7
I
O
5
8
I
O
6
9
I
O
7
1
0
G
N
D
1
1
U14
MACH231-7
B
_
A
4
B
_
A
5
B
_
A
6
B
_
A
7
B
_
A
1
2
B
_
A
1
3
B_A14
B_A15
B_A16
G
N
D
M
_
A
2
M
_
A
3
M_A4
M_A5
nWE
B_LAST
B
_
W
R
I
T
E
V
C
C
G
N
D
V
C
C
2 100n DEC CAPS
MONITOR POINTS
SERIAL TERMINATION RESISTORS
C35
10n
C36
10n
C39
100n
C40
100n
1
V57
1
V58
1
V59
1
V60
COLMUX
CASEN
COLADDR
nCAS3
nCAS0
nCAS1
nCAS2
GND
B
_
A
0
B
_
A
1
B
_
A
2
B
_
A
3
B
_
A
1
0
B
_
A
1
1
M
_
A
0
M
_
A
1
C37
10n
C38
10n
C41
100n
C42
100n
R66
33R
R67
33R
R68
33R
R69
33R
R72
33R
R73
33R
RAMVCC
M_D5
M_D6
M_D7
M_D21
M_D22
M_D23
GND
PUDUPA0
PUDUPA1
PUDUPA2
PUDUPA3
RAMVCC
RnCAS0
RnCAS2
RnCAS3
RnCAS1
RnRAS0
RnRAS1
RnRAS0
RA0
RA1
RA2
RA3
RA4
RA8
RA9
M_A0
M_A1
M_A2
M_A3
M_A4
RA7
GND
GND
RAMVCC
M_D5
M_D6
M_D7
M_D21
M_D22
M_D23
GND
PUDUPB0
PUDUPB1
PUDUPB2
PUDUPB3
RnRAS2
RnRAS3
RnRAS2
RnCAS0
RnCAS2
RnCAS3
RnCAS1
RA7
RA8
RA9
RAMVCC
M_D8
M_D9
M_D10
M_D11
M_D12
M_D13
M_D14
M_D15
M_D24
M_D25
M_D26
M_D27
M_D28
M_D29
M_D30
M_D31
RnRAS3
RnWE
R70
33R
R71
33R
R74
33R
R75
33R
R76
33R
R77
33R
R78
33R
R79
33R
R80
33R
R81
33R
R82
33R
R83
33R
R84
33R
R85
33R
R95
4K7
RAMVCC
M_D8
M_D9
M_D10
M_D11
M_D12
M_D13
M_D14
M_D15
M_D24
M_D25
M_D26
M_D27
M_D28
M_D29
M_D30
M_D31
PD0
PD1
nCAS3
nCAS0
nCAS1
nCAS2
nRAS0
nRAS1
nRAS2
nRAS3
RnCAS0
RnCAS1
RnCAS2
RnCAS3
RnRAS0
RnRAS1
RnRAS2
RnRAS3
RnRAS1
M_A8
M_A9
nWE
RA5
RA6
RA7
RA8
RA9
RnWE
RnWE
M_A5
M_A6
M_A7
M_A10 RA10
VCC
PLACE NEAR TO SIGNAL SOURCE
1
V55
1
V56
CASSSTART
GND
VCC
D_SELDRAM
nRAS0
nRAS1
nRAS2
nRAS3
REFCYC
MEMCYC
B_A24
B_A25
n
O
E
B
D
R
E
F
C
L
K
R
E
F
R
E
Q
B
_
S
I
Z
E
0
B
_
S
I
Z
E
1
B
I
G
E
N
D
G
N
D
nB_CLK0
SPARE I/O
1
V52
B_A8
B_A9
B_A17
B_A18
B
_
A
1
9
B
_
A
2
0
B
_
A
2
1
B
_
A
2
2
B
_
A
2
3
M_A6
M_A7
M
_
A
8
M
_
A
9
M
_
A
1
0
PD0
PD1
B_WAIT
B
_
R
E
S
0
n
O
E
M
D
VCC
GND
GND
V
C
C
G
N
D
V
C
C
DECOUPLING CAPACITORS
C30
10u
C31
100n
C32
100n
C33
100n
C34
100n
VCC
GND
VCC
GND
SPARE I/O
MONITOR POINT
USE IDENTICAL SIMMS IF BOTH SLOTS USED
1
V53
1
V54
PULLUP RESISTORS
R86
4K7
R87
4K7
R88
4K7
R89
4K7
R90
4K7
R91
4K7
R92
4K7
R93
4K7
R94
4K7
GND
PUDUPA0
PUDUPA1
PUDUPA2
PUDUPA3
PUDUPB0
PUDUPB1
PUDUPB2
PUDUPB3
PD0
PD1
SLOT A
GND
h
rg.
b
oo
k
P
age
9
W
e
d
nes
d
ay,
J
u
l
y
22
,
1998
9
:
18
AM

ARM ARM7TDMI Specifications

General

Brand	ARM
Model	ARM7TDMI
Category	Computer Hardware
Language	English