Table 4-5 SCC_CFG4 Register bit assignments
Bits Name Function
[31:4] - Reserved. Do not write to these bits.
[3:0] Board revision • 0000 = A
• 0001 = B
• 0010 = C
Related information
4.3 Register summary on page 4-62
4.4.6 SCC_DLL Register
The SCC_DLL Register characteristics are:
Purpose
Digital Locked Loop (DLL) lock status bits from the FPGA. You read from it to determine the
lock status of the DLLs. You can ignore the lock status of some of the DLLs by writing to the
DLL_LOCK_MASK bits. The DLLs you ignore depends upon the values of these bits.
Usage constraints
The SCC_DLL Register is read-only.
Configurations
Available in all MPS2 and MPS2+ configurations.
The following figure shows the bit assignments.
31
024 23 16 15 1
DLL_LOCK_MASK
Reserved
DLL_LOCKED[7:0] ALL_UNMASKED_DLLS_LOCKED
1 1 1
1
1 1 1
1
1 1 1
1 1 1 0 0
0
Figure 4-5 SCC_DLL Register bit assignments
The following table shows the bit assignments.
Table 4-6 SCC_DLL Register bit assignments
Bits Name Function
[31:24] DLL_LOCK_MASK[7:0] These bits mask bits[23:16], that is, you ignore the corresponding
DLL_LOCKED bits.
• 0b0:
— Mask DLL lock status. Corresponding DLL_LOCKED bit, that is the
lock status of the corresponding DLL, does not contribute to the value of
bit[0].
• 0b1:
— Do not mask DLL lock status. Corresponding DLL_LOCKED bit, that is
the lock status of the corresponding DLL, contributes to the value of
bit[0].
BIT[23:16] DLL_LOCKED[7:0] These bits indicate the lock statuses of the individual DLLs:
• 0b0 DLL unlocked.
• 0b1 DLL locked.
4 Programmers Model
4.4 SCC register descriptions
100112_0200_09_en Copyright © 2013–2016, 2018–2020 Arm Limited or its affiliates. All
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