ARM MPS2 User Manual

2.2 Clocks
The MPS2 and MPS2+ FPGA Prototyping Boards each provide three programmable on‑board clock
generators.
Overview of clocks
Three clock generators on the MPS2 and MPS2+ FPGA Prototyping Boards and other clock generators
inside the FPGA generate the clocks that the board uses. The MCC configures the programmable clock
generators during powerup sequencing using values that the configuration files define.
You configure the frequencies of the on‑board clock generators by editing the OSCLKS section of the
application note .txt file in the microSD card.
You can bypass the on‑board clock generators and import external clocks to the MCC board using the
connection headers that the MPS2 and MPS2+ FPGA Prototyping Boards provide.
The following figure shows the clocks on the MPS2 and MPS2+ FPGA Prototyping Boards. The figure
shows two of the clock generators that connect to PLLs inside the FPGA with external loopback to logic
inside the FPGA. The third clock generator connects directly to logic inside the FPGA.
Note
• The slide switches and connection headers are for general‑purpose use. You can use them for any
purpose whatsoever according to the needs of the design which you implement in the FPGA.
• The availability of clock generators and logic in the FPGA depend on the design which you
implement in the FPGA.
MPS2/MPS2+ FPGA Prototyping Board
OSC0
FPGA
PLL
Logic
OSC1 PLL
Logic
Slide switch
J22
Connection
header
J18
V
SS
Slide switch
J23
Connection
header
J19
V
SS
OSC2 Logic
Figure 2-2 Board clocks
2 Hardware Description
2.2 Clocks
100112_0200_09_en Copyright © 2013–2016, 2018–2020 Arm Limited or its affiliates. All
rights reserved.
2-25
Non-Confidential

ARM MPS2 Specifications

General

Brand	ARM
Model	MPS2
Category	Computer Hardware
Language	English