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ARM MPS2 User Manual

ARM MPS2
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4.5 System configuration registers
This section describes system configuration registers, that is, the SYS_CFG registers.
This section contains the following subsections:
4.5.1 Overview of system configuration registers on page 4-70.
4.5.2 SYS_CFGDATA_RTN Register on page 4-70.
4.5.3 SYS_CFGDATA_OUT Register on page 4-71.
4.5.4 SYS_CFGCTRL Register on page 4-72.
4.5.5 SYS_CFGSTAT Register on page 4-73.
4.5.1 Overview of system configuration registers
The system configuration registers enable communication between the MCC and the FPGA.
The configuration, or SYS_CFG, registers are: SYS_CFGDATA_RTN, SYS_CFGDATA_OUT,
SYS_CFGCTRL and SYS_CFGSTAT. These registers implement and control write and read operations
when the application software inside the FPGA writes and reads configuration information to and from
peripherals on the MPS2 or MPS2+ FPGA Prototyping Board.
The following block of example pseudocode shows a write operation to write 24MHz to clock generator
1.
//Write frequency value to the user data out register.
1: Set SYS_CFGDATAT_OUT = 24000000
//Write to control register. Initiate write process and select clock generator 1 and
oscillator function.
//This clears Configuration error bit and Configuration complete bit of SYS_CFGSTAT
Register.
2: Set SYS_CFGCTRL Start = 1; nREAD_Write_access = 1; Function = 1; Device = 1;
//Read status register to determine status of of write operation.
3: Read SYS_CFGSTAT[Configuration error bit, Configuration complete bit]
If ( Configuration error bit = 1 )
return TRANSACTION FAIL;
If ( Configuration error bit = 0 AND Configuration complete bit = 1)
return TRANSACTION OK;
If ( Configuration error bit = 0 AND Configuration complete bit = 0)
GOTO 1;
The following block of example pseudocode show a read operation to read the frequency of clock
generator 2.
//Write to control register. Initiate read process and select clock generator 2 and
oscillator function.
//This clears Configuration error bit and Configuration complete bit of SYS_CFGSTAT
Register.
1: Set SYS_CFGCTRL Start = 1; nREAD_Write_access = 0; Function = 1; Device = 2;
//Read status register to determine status of of read operation.
2: Read SYS_CFGSTAT[Configuration error bit, Configuration complete bit]
If ( Configuration error bit = 1 )
return TRANSACTION FAIL;
If ( Configuration error bit = 0 AND Configuration complete bit = 1)
return TRANSACTION OK;
If ( Configuration error bit = 0 AND Configuration complete bit = 0)
GOTO 1;
4.5.2 SYS_CFGDATA_RTN Register
The SYS_CFGDATA_RTN Register characteristics are:
4 Programmers Model
4.5 System configuration registers
100112_0200_09_en Copyright © 2013–2016, 2018–2020 Arm Limited or its affiliates. All
rights reserved.
4-70
Non-Confidential

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ARM MPS2 Specifications

General IconGeneral
BrandARM
ModelMPS2
CategoryComputer Hardware
LanguageEnglish

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