2/24/2008 9T6WP
Preliminary Hardware Data Module BCM7405
06/29/07
Broadcom Corporation
Document 7405-1HDM00-R Page v
Capture Block
..................................................................................................................... 1-42
Digital Noise Reduction ............................................................................................................. 1-43
DNR Operations
.................................................................................................................. 1-43
Digital Contour Removal............................................................................................................. 1-43
Graphics Subblock Description...................................................................................................1-44
Scaler Overview
.................................................................................................................. 1-45
Feeder Architecture (Source and Destination)
.................................................................... 1-46
Color Keying and Color Matrix Architecture
........................................................................ 1-47
Compositor Architecture
..................................................................................................... 1-48
ROP Architecture
................................................................................................................ 1-49
Capture Architecture
........................................................................................................... 1-49
Digital Video Decoder (ITU-R-656) ............................................................................................. 1-50
VBI Decoding
...................................................................................................................... 1-50
Analog Video Encoder ................................................................................................................ 1-50
VBI Encoding
...................................................................................................................... 1-52
Video DACs ................................................................................................................................ 1-53
Digital Video Encoder ................................................................................................................. 1-53
Safe Mode
........................................................................................................................... 1-53
Supported Modes
................................................................................................................ 1-54
Supported PC Scan Rates
.................................................................................................. 1-55
RF Modulator ..................................................................................................................................... 1-56
Overview ..................................................................................................................................... 1-56
Features...................................................................................................................................... 1-56
Typical Usage Modes ................................................................................................................. 1-57
Supported Television Standards
......................................................................................... 1-57
Audio Transmission Modes
................................................................................................. 1-58
Baseband BTSC Composite Output Mode
......................................................................... 1-58
Sound IF Output Mode
........................................................................................................ 1-58
Unsupported Audio Mode
................................................................................................... 1-58
Memory Controller ............................................................................................................................. 1-59
Overview ..................................................................................................................................... 1-59
DRAM Physical Layer Controller ................................................................................................ 1-61
Memory Configurations Supported
..................................................................................... 1-61
DRAM Transaction Layer Controller ........................................................................................... 1-62
Arbitration
............................................................................................................................ 1-62