2/24/2008 9T6WP
BCM7405 Preliminary Hardware Data Module
06/29/07
Broadcom Corporation
Page vi Document 7405-1HDM00-R
Buses
..................................................................................................................................1-62
DDR-SDRAM Memory Image Organization
........................................................................1-62
Digital Video Compression Standards
.................................................................................1-62
Memory Accesses for Video Decompression
......................................................................1-62
DDR Clock Generation................................................................................................................1-62
MIPS4380 Processor Core.................................................................................................................1-63
Overview .....................................................................................................................................1-63
Architecture .................................................................................................................................1-63
Micro-Architecture .......................................................................................................................1-64
EJTAG Debug Support................................................................................................................1-64
Major Functional Blocks ..............................................................................................................1-65
Execution Unit
.....................................................................................................................1-65
Multiply Divide Unit
..............................................................................................................1-66
Floating-Point Unit
...............................................................................................................1-66
eDSP Extended Instructions .......................................................................................................1-67
MIPS16e Application-Specific Extension ....................................................................................1-67
Memory Management Unit with TLB ...........................................................................................1-67
System Control Coprocessor (CP0) ............................................................................................1-68
Instruction Cache ........................................................................................................................1-68
Data Cache .................................................................................................................................1-68
Level-Two Cache ........................................................................................................................1-69
Readahead Cache ......................................................................................................................1-69
Little and Big Endianness of Byte Ordering.................................................................................1-69
Debugging Support Unit ..............................................................................................................1-70
Peripherals .........................................................................................................................................1-71
Overview .....................................................................................................................................1-71
Peripheral Control Unit ................................................................................................................1-71
Keypad Controller........................................................................................................................1-71
LED Controller.............................................................................................................................1-71
IR Receiver Controller .................................................................................................................1-71
IR Blaster Controller ....................................................................................................................1-72
UHF Receiver..............................................................................................................................1-74
UART...........................................................................................................................................1-75
General Description
.............................................................................................................1-75
Functional Description
.........................................................................................................1-76