Caen V2718 - Control Register; Firmware Revision Register; Fig. 7: Control Register

Document type:
Title:
Revision date:
Revision:
User's Manual (MUT)
Mod. V2718 VME PCI Optical Link Bridge
03/07/2018
11
NPO:
Filename:
Number of pages:
Page:
00106/03:V2718.MUTx/11
V2718_REV11.DOC
79
22
2.13.2. Control register
(Base Address + 0x01, D16, read/write)
This register allows performing some general settings of the module.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ARBITER_TYPE
REQUESTER_TYPE
RELEASE_TYPE
BUS_REQ_LEVEL
INTERRUPT_REQ
SYS_RES
BUS_TIMEOUT
ADDR_INCREMENT
Fig. 7: Control Register
Arbiter Type: 0 = Fixed Priority
1 = Round Robin
Requester Type: 0 = Fair
1 = Demand
Release Type: 0 = Release when done
1 = Release on request
Bus Timeout: 0 = 50 µs
1 = 1400 µs
Address Increment: 0 = Enabled
1 = Disabled (FIFO mode)
2.13.3. Firmware Revision register
(Base Address + 0x02, D16, read only)
This register contains the firmware revision number coded on 16 bit. For example the
REV. X.Y would feature:
Fig. 8: Firmware Revision Register
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X Y