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Caen V2718 - Output Clear Register; Fig. 13: Output Set Register

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User's Manual (MUT)
Mod. V2718 VME PCI Optical Link Bridge
03/07/2018
11
NPO:
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00106/03:V2718.MUTx/11
V2718_REV11.DOC
79
25
2.13.10. Output clear register
(Base Address + 0x10, D16, write only)
This register allows to clear the output register pattern (1 = Clear, 0 = leave previous
setting).
Fig. 13: Output set register
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PLSA_START
PLSA_RESET
SCR_GATE
SCR_RESET
OUT0
PLSB_START
PLSB_RESET
OUT1
OUT2
OUT3
OUT4

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